Gate Line Charge Distribution for LCD Power Reduction
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Solution Overview
Problem
Conventional liquid crystal display devices face challenges in reducing power consumption, especially as they become higher in definition and thicker, requiring more efficient drive circuits without complicating the circuit configuration.
Innovation Solution
A drive circuit is implemented with transistors and control lines connected to gate lines, allowing for the distribution of charge between adjacent gate lines to reduce the potential required for image display, thereby minimizing power consumption without increasing circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If conventional source driver supplies positive and negative polarity source signals to source lines in vertical blanking period with electrical separation, then a predetermined DC voltage value is held in the source line, but power consumption is not sufficiently reduced as a whole liquid crystal display device
Solution Approach 1:
The gate line voltage is preliminarily raised by charge distribution from adjacent gate lines before the actual display drive. This preliminary action reduces the voltage swing required during normal operation, thereby reducing power consumption without requiring complex circuit modifications
Solution Approach 2:
Adjacent gate lines are electrically connected through transistors to share charge, merging their electrical characteristics temporarily. This allows one gate line to supply charge to another, reducing the overall power consumption of the gate driver circuit while maintaining a relatively simple circuit configuration
2Measurement precision
If the liquid crystal display device is made higher in definition, then display quality is improved, but power consumption increases
Solution Approach 1:
By preliminarily charging gate lines to a higher potential through charge distribution, the voltage swing required for high-definition display is reduced. This allows high definition display quality while consuming less power than conventional approaches would require
3Volume of moving object
If the liquid crystal display device is made thinner and narrowed, then device size is reduced, but it becomes necessary to avoid complicated circuit configuration
Solution Approach 1:
The circuit merges adjacent gate lines through transistor connections, allowing charge sharing and reducing the need for separate, complex driving circuits. This enables thinner and narrower device design while avoiding complicated circuit configurations
Solution Approach 2:
The transistor connections between gate lines serve multiple functions: they distribute charge to reduce power consumption, maintain voltage levels, and enable compact circuit design. This multi-functionality allows device size reduction without increasing circuit complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption by pre-charging gate lines to a lower potential, decreasing the drive power required for the liquid crystal display device while maintaining display quality and avoiding complex circuit configurations.
Implementation Method 1
The first transistor is put into an on state to distribute part of a charge charged in the first gate line to the second gate line
Data Source
AI summary
A drive circuit includes an output circuit provided in a display panel to output a gate-on voltage and a gate-off voltage to a plurality of gate lines. The plurality of gate lines include first to sixth gate lines sequentially disposed in a scanning direction. A first transistor is put into an on state to electrically connect the first gate line and the third gate line, a second transistor is put into the on state to electrically connect the second gate line and the fourth gate line, the third transistor is put into the on state to electrically connect the third gate line and the fifth gate line, and the fourth transistor is put into the on state to electrically connect the fourth gate line and the sixth gate line, after the output circuit outputs the gate-on voltage to the first to fourth gate line.