Supplemental Gate Line Loading for Uniform Brightness in Displays
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Solution Overview
Problem
Electronic devices with displays, particularly those having non-rectangular shapes, face brightness variations due to uneven capacitive loading on gate lines caused by differing numbers of pixels in each row, leading to inconsistent pixel brightness.
Innovation Solution
The implementation of supplemental gate line loading structures in the inactive areas of the display, utilizing doped polysilicon and transparent conductive layers to increase capacitive loading on gate lines coupled to short pixel rows, and transparent conductive electrodes to enhance loading on common voltage lines, thereby ensuring uniform brightness across all rows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate lines are extended into the inactive area to couple short pixel rows, then connectivity is improved, but brightness uniformity deteriorates due to insufficient capacitive loading
Solution Approach 1:
The patent applies local quality by providing row-dependent supplemental loading structures specifically to gate lines coupled to short pixel rows. The loading structures are selectively positioned in the inactive area only where needed, with different loading amounts applied to different rows based on their pixel count, thereby maintaining brightness uniformity without unnecessarily complicating the overall display structure.
Solution Approach 2:
The patent utilizes the inactive area dimension to resolve the contradiction. By extending gate lines into the inactive area and placing supplemental loading structures in this previously unused space, the solution adds capacitive loading without occupying active pixel space, thus maintaining both connectivity and brightness uniformity.
2Illumination intensity
If supplemental loading structures are added to gate lines in the inactive area, then brightness uniformity is improved, but device complexity increases
Solution Approach 1:
The patent merges the supplemental loading structures with existing display components. The loading structures are formed using the same transparent conductive material as the common electrode, and are integrated into the inactive area without requiring separate fabrication processes or additional material layers, thereby reducing the increase in device complexity.
Solution Approach 2:
The transparent conductive layer serves multiple functions: it acts as both the common electrode for the active area and provides supplemental capacitive loading in the inactive area. This multi-functionality reduces the need for separate components and simplifies the overall display structure while maintaining brightness uniformity.
3Adaptability or versatility
If different rows have different numbers of pixels, then display flexibility is improved, but capacitive loading uniformity deteriorates
Solution Approach 1:
The patent applies local quality by providing row-dependent supplemental loading structures specifically to gate lines coupled to short pixel rows. The loading structures are selectively positioned in the inactive area only where needed, with different loading amounts applied to different rows based on their pixel count, thereby maintaining brightness uniformity without unnecessarily complicating the overall display structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively minimizes brightness variations by adjusting gate line loading based on row position, ensuring consistent luminance across the display, even in areas with varying pixel counts, thereby improving display performance.
Implementation Method 1
The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. The doped polysilicon may be coupled to a bias voltage supply line such as a ground line or other signal line.
Implementation Method 2
A transparent conductive layer such as an extension of a common electrode voltage layer may be used in the inactive area of the display to couple the polysilicon to the bias voltage supply line.
Implementation Method 3
The transparent conductive electrodes and the common voltage pads form capacitors that increase the capacitive loading on the common voltage lines that are coupled to short rows of common voltage pads.
Data Source
AI summary
A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.