Gate Line Segmentation for Signal Delay Uniformity in Displays
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Solution Overview
Problem
Large-sized and high-resolution flat panel display devices face issues with display quality deterioration due to signal transmission time delays between adjacent gate lines, leading to horizontal line defects, especially when the bezel size increases.
Innovation Solution
The implementation of a display device configuration where gate lines are electrically connected to the center of corresponding sub-gate lines, ensuring consistent signal delay times between adjacent gate lines, and utilizing multiple gate drivers for interlaced driving schemes to prevent horizontal line defects, even in large-sized displays with narrow bezels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the flat panel display device size increases and resolution increases, then the display quality deteriorates due to signal transmission time delays between adjacent gate lines
Solution Approach 1:
The gate lines are divided into multiple sub-gate lines (first sub-gate line, second sub-gate line, third sub-gate line, fourth sub-gate line) that are electrically connected to different ends of the same gate line. This segmentation allows signals to be transmitted to different regions of the display panel simultaneously from multiple gate drivers, reducing the overall signal transmission time delay and preventing horizontal line defects in large-sized high-resolution displays.
2Measurement precision
If the bezel size increases, then the display quality deteriorates due to signal transmission time delays
Solution Approach 1:
The gate lines are segmented into multiple sub-gate lines with different electrical connection points. By connecting to different ends of the gate line, the system can reduce signal transmission time delays that would otherwise cause horizontal line defects, thereby maintaining display quality even in devices with larger bezel sizes.
3Reliability
If multiple gate lines are simultaneously driven, then the horizontal line defect is prevented, but the signal delay times between adjacent gate lines become uneven
Solution Approach 1:
Different sub-gate lines are electrically connected to different ends of the gate lines, creating locally optimized signal transmission paths. The first sub-gate line connects to the first end while the second sub-gate line connects to the second end, allowing each region to receive signals with appropriate timing adjustments. This local quality approach ensures uniform signal delay times across all gate lines while enabling simultaneous driving, thereby preventing horizontal line defects.
Data Source
AI summary
A display device includes a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction, a plurality of sub-gate lines corresponding to the plurality of gate lines and extending in a first direction to be adjacent to a corresponding gate line of the plurality of gate lines, a gate driver configured to drive the plurality of gate lines, a data driver configured to drive the plurality of data lines, and a plurality of pixels arranged in a display area, where an end of each of the plurality of gate lines extends in the first direction from the gate driver is electrically connected to a center portion of a corresponding sub-gate line in the first direction.


