Gate Structure Fabrication via Nitrogen Redistribution

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Solution Overview

Problem

Conventional semiconductor processes face challenges with high-K dielectric layers due to inferior interface properties with silicon substrates, leading to increased leakage current, polysilicon gate depletion, and reduced device reliability, which are exacerbated by the miniaturization of gate structures.

Innovation Solution

A method involving a sacrificial oxide layer with a nitridation treatment to redistribute nitrogen, followed by re-oxidation to form a silicon oxynitride interface layer, and subsequent deposition of a high-K gate dielectric, barrier, and metal layers to create a stacked gate structure, improving interface quality and reducing nitrogen concentration in the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a high-K dielectric layer is integrated to reduce leakage current, then leakage current is reduced, but interface properties deteriorate and device reliability decreases

Engineering Contradiction:
Improveleakage currentVSAvoiddevice reliability
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

A silicon oxynitride interface layer is introduced as an intermediary between the silicon substrate and the high-K dielectric layer. This interface layer has superior interface properties that prevent the deterioration caused by direct contact between the high-K dielectric and silicon substrate, thereby maintaining device reliability while allowing the use of high-K materials to reduce leakage current

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The nitrogen concentration is locally optimized in the interface layer through controlled nitridation treatment. The nitrogen concentration profile is designed to be highest at the silicon-substrate interface and decrease toward the high-K dielectric interface, creating local quality variations that improve interface properties without compromising the overall device structure

Inventive Principle:
Principle #3Local quality

2Productivity

If gate dielectric layer thickness is reduced to increase device integration, then device integration increases, but direct tunneling increases leading to rapid increase in leakage current

Engineering Contradiction:
Improvedevice integrationVSAvoidleakage current
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The dielectric constant parameter is changed by transitioning from conventional silicon oxide to high-K dielectric materials. This parameter change allows the gate dielectric layer to maintain effective insulation with reduced physical thickness, thereby increasing device integration while preventing excessive leakage current through direct tunneling

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If nitrogen is doped in the oxide layer to ameliorate boron penetration, then boron penetration is reduced, but nitrogen concentration in substrate increases affecting device performance

Engineering Contradiction:
Improveboron penetrationVSAvoiddevice performance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The nitrogen concentration is locally optimized in the interface layer through controlled nitridation treatment. The nitrogen concentration profile is designed to be highest at the silicon-substrate interface and decrease toward the high-K dielectric interface, creating local quality variations that improve interface properties without compromising the overall device structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The silicon oxynitride interface layer acts as an intermediary that provides nitrogen for boron penetration protection while confining the nitrogen primarily within the interface layer itself, preventing excessive nitrogen diffusion into the substrate and maintaining device performance

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances device performance by controlling nitrogen distribution, reducing equivalent oxide thickness, and minimizing electron mobility loss, thereby improving the reliability and operation of semiconductor devices.

Implementation Method 1

A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

a re-oxidation process is performed to produce an interface layer on the surface of the substrate

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS7435640B2Method of fabricating gate structure
Publication Date: 2008.10.14 UNITED MICROELECTRONICS CORP
  • US7435640B2 patent drawing
  • US7435640B2 patent drawing
  • US7435640B2 patent drawing

AI summary

A method of fabricating a gate structure is provided. First, a sacrificial oxide layer is formed on a substrate. A nitridation treatment process is performed to redistribute the nitrogen atoms in the sacrificial layer and the substrate and produce a concentration profile such that the concentration of nitrogen progressively increases and then decreases toward the substrate with the maximum concentration of nitrogen in the sacrificial oxide layer. Next, the sacrificial oxide layer is removed. A re-oxidation process is performed to produce an interface layer on the surface of the substrate. A high K (dielectric constant) gate dielectric layer, a barrier layer and a metal layer are sequentially formed on the substrate. The metal layer, the barrier layer, the high K gate dielectric layer and the interface layer are defined to form a stacked gate structure.