Gate Oxide Capacitance Correction Under High Leakage Current
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Solution Overview
Problem
Existing LCR meters fail to accurately measure capacitance values in advanced semiconductor processes due to high leakage currents, leading to underestimated capacitance readings, especially in Gate Oxide layers, as traditional binary models ignore series resistance, and higher frequency instruments are unsuitable for wafer-level mass production.
Innovation Solution
A capacitance correction method using a parallel binary model with two frequency measurements and a ternary capacitance model formula to calculate the actual capacitance value, incorporating series resistance, by measuring with a conventional LCR meter at two frequencies and applying formulas to derive the true capacitance value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a traditional parallel binary model is used for capacitance measurement, then the measurement is simple and compatible with conventional LCR meters, but the measurement accuracy deteriorates due to high leakage current in advanced processes
Solution Approach 1:
The patent changes the measurement parameters by introducing frequency as a variable. It measures capacitance at two different frequencies (f1 and f2) and uses the difference to calculate the series resistance effect, thereby compensating for the measurement error caused by high leakage current while maintaining compatibility with conventional LCR meters
Solution Approach 2:
The patent replaces the traditional single-frequency parallel model measurement approach with a dual-frequency measurement system that uses mathematical calculation to derive corrected capacitance values, substituting the need for complex hardware modifications with a computational correction method
2Measurement precision
If a higher test frequency is used to obtain accurate capacitance values, then the measurement accuracy improves, but the device complexity and suitability for mass production deteriorates
Solution Approach 1:
The patent creates a mathematical model (copy) of the measurement system that simulates the effect of high-frequency measurement without actually requiring high-frequency instrumentation. By calculating the series resistance impact using dual-frequency measurements at standard frequencies, it reproduces the accuracy benefits of high-frequency measurement while maintaining compatibility with conventional mass production equipment
3Length of moving object
If the Gate Oxide thickness is reduced for advanced processes, then the device performance improves, but the leakage current increases causing measurement errors
Solution Approach 1:
The patent converts the harmful effect of leakage current into a useful measurement parameter. By measuring the dissipation factor and using it to calculate the series resistance, the method transforms the leakage current from a source of error into information that enables correction of the capacitance measurement, allowing accurate measurements even in the presence of high leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method provides accurate capacitance values closer to the true capacitance of Gate Oxide layers, aligning with physical device characteristics, suitable for mass production using conventional LCR meters.
Implementation Method 1
LCR meter is a measuring instrument used to measure semiconductor inductance, resistance, and electrical parameters of capacitance devices
Implementation Method 2
the leakage current at the Gate end increases sharply due to direct tunneling current
Data Source
AI summary
The present invention provides a parallel binary model for measuring a capacitance value of a gate oxide layer of a gate oxide MOS device. The parallel binary model is a parallel circuit model formed through parallel connection of a parallel capacitor Cp and an equivalent resistor Rp. The parallel binary model is used to measure the gate oxide MOS device through an LCR meter by adopting frequency f1 to obtain parallel capacitance Cp1 and parallel conductance Gp1. A dissipation factor D1 is calculated. In a case that D1<0.1, the measured parallel capacitance Cp1 is the capacitance value of the gate oxide layer of the gate oxide MOS device. In a case that D1>0.1, the parallel binary model is used to measure the gate oxide MOS device through the LCR meter by adopting frequency f2 to obtain parallel capacitance Cp2 and parallel conductance Gp2.