High-Voltage Gate Oxide Layout for Reliability and Low Drift Resistance
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Solution Overview
Problem
Conventional high voltage semiconductor devices face challenges in improving electrical performance and voltage endurance, particularly in the design and process modifications of their structural components.
Innovation Solution
A high voltage semiconductor device with a gate oxide layer featuring portions of different thicknesses is developed, where a thicker portion enhances reliability and a thinner portion improves electrical performance, addressing the limitations of uniform gate oxide layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform gate oxide layer is used, then the manufacturing process is simple, but the electrical performance and reliability cannot be simultaneously optimized
Solution Approach 1:
The gate oxide layer is designed with different thicknesses in different regions: a first thickness in the first region and a second thickness in the second region. This local differentiation allows optimization of electrical performance in specific areas without compromising overall device reliability, resolving the contradiction between simple manufacturing and optimized performance.
2Reliability
If the gate oxide layer thickness is increased to improve reliability, then voltage endurance improves, but electrical performance deteriorates
Solution Approach 1:
Different regions of the gate oxide layer have different thicknesses optimized for their specific functions. The first region has a thickness optimized for electrical performance while the second region has a thickness optimized for reliability, allowing both requirements to be satisfied simultaneously through spatial differentiation.
Solution Approach 2:
The gate oxide layer is segmented into multiple regions with different thickness characteristics. This segmentation allows independent optimization of each region's thickness to meet different performance requirements, resolving the trade-off between voltage endurance and electrical performance.
3Reliability
If a thicker gate oxide layer is used throughout, then negative-bias temperature instability is reduced, but resistance at drift regions increases
Solution Approach 1:
The gate oxide layer thickness is locally optimized: regions requiring stability against negative-bias temperature instability have thicker oxide, while drift regions requiring low resistance have thinner oxide. This local quality differentiation resolves the contradiction between reducing instability and maintaining low resistance.
Data Source
AI summary
A high voltage semiconductor device includes a semiconductor substrate, an isolation structure, a gate oxide layer, and a gate structure. The semiconductor substrate includes a channel region, and at least a part of the isolation structure is disposed in the semiconductor substrate and surrounds the channel region. The gate oxide layer is disposed on the semiconductor substrate, and the gate oxide layer includes a first portion and a second portion. The second portion is disposed at two opposite sides of the first portion in a horizontal direction, and a thickness of the first portion is greater than a thickness of the second portion. The gate structure is disposed on the gate oxide layer and the isolation structure.