Gate Oxide Protection in MOSFET Manufacturing

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Solution Overview

Problem

Conventional MOSFET device manufacturing processes result in damage to the gate oxide layer during the etching of source and drain regions, leading to device failure or reduced performance due to the undercutting of the gate oxide layer, which necessitates thick protective sidewalls that increase the source to drain well distance, affecting device efficiency.

Innovation Solution

A method involving the formation of a protective barrier layer within the undercut area under the gate to prevent corrosion of the gate oxide layer, allowing for thinner sidewalls and maintaining the integrity of the gate oxide layer during subsequent processing steps, thereby preventing short circuits and improving device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thick protective sidewalls are used to prevent gate oxide corrosion during etching, then device reliability is improved, but the source to drain well distance increases reducing device productivity

Engineering Contradiction:
Improvegate oxide integrityVSAvoidsource to drain well distance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

A protective barrier layer is formed within the undercut area under the gate before the etching of source and drain regions. This preliminary protective action prevents corrosion of the gate oxide layer during subsequent processing steps, eliminating the need for thick sidewalls and allowing reduced source to drain well distance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective barrier layer acts as an intermediary material placed between the gate oxide layer and the etching environment. This intermediary layer prevents direct contact between corrosive etchants and the gate oxide, providing protection without requiring thick sidewall structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If isotropic EPI pre-clean step is performed to remove native oxide, then manufacturing precision is improved, but the gate oxide layer is etched away causing undercut

Engineering Contradiction:
Improvesource and drain region cleanlinessVSAvoidgate oxide layer integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The protective barrier layer is formed in advance to counteract the harmful effect of the isotropic EPI pre-clean step. By having this protective layer in place before the cleaning step, the gate oxide layer is shielded from the removal reagents that would otherwise cause undercutting.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The protective barrier layer serves as an intermediary that allows the isotropic EPI pre-clean step to proceed effectively for source and drain region cleaning while preventing the same cleaning reagents from attacking the gate oxide layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The protective barrier layer ensures the gate oxide layer remains intact, reducing the risk of short circuits and allowing for a closer source to drain well distance, enhancing transistor efficiency and performance by maintaining the desired gate oxide length.

Implementation Method 1

a protective barrier layer within an undercut area under the gate to prevent corrosion of the gate oxide layer

Methodology Applied
Scientific EffectPhysical barrier protection:

Implementation Method 2

The dielectric constant k of the gate oxide material and the thickness d of the gate oxide layer determine the capacitance and field homogeneity

Methodology Applied
Scientific EffectDielectric property: Dielectric

Data Source

PatentUS7491623B2Method of making a semiconductor structure
Publication Date: 2009.02.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US7491623B2 patent drawing
  • US7491623B2 patent drawing
  • US7491623B2 patent drawing

AI summary

The invention is directed to a structure and method of forming a structure having a sealed gate oxide layer. The structure includes a gate oxide layer formed on a substrate and a gate formed on the gate oxide layer. The structure further includes a material abutting walls of the gate and formed within an undercut underneath the gate to protect regions of the gate oxide layer exposed by the undercut. Source and drain regions are isolated from the gate by the material.