Gate Oxide Thickness Uniformity via Silicon Spacer
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Solution Overview
Problem
Conventional gate oxide layer formation in MOS devices suffers from non-uniform thickness, particularly at the periphery, which affects the performance and reliability of both low and high voltage MOS devices due to thinner edges leading to issues like kink effects and breakdowns.
Innovation Solution
A method involving the formation of a silicon spacer on the sidewall of the opening within the shallow trench isolation structure, where a polysilicon layer is deposited, etched back to expose the nitride mask layer, and then oxidized to merge with the gate oxide layer, enhancing thickness uniformity by compensating for thinner peripheries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional thermal oxidation is used to form the gate oxide layer, then the fabrication process is simple, but the thickness uniformity of the gate oxide layer deteriorates due to thinner edges at the periphery
Solution Approach 1:
A silicon spacer is formed on the sidewall of the opening before the oxidation process. This preliminary structure compensates for the expected thinning at the periphery during oxidation, ensuring uniform gate oxide thickness by providing additional material that will be oxidized along with the substrate
Solution Approach 2:
The silicon spacer acts as an intermediary element between the mask layer and the substrate. It is formed by depositing a polysilicon layer and performing an etching back process, then serves as a template that guides the oxidation process to achieve uniform gate oxide thickness at the periphery
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves thickness uniformity of the gate oxide layer, preventing edge thinning and enhancing the performance and reliability of MOS devices by ensuring consistent thickness across the gate oxide layer.
Implementation Method 1
forming a polysilicon layer over the substrate to at least cover the opening of the mask layer
Implementation Method 2
performing an etching back process, to etch the polysilicon layer until the mask layer is exposed
Implementation Method 3
An oxidation process is performed on the substrate at the region to form the gate oxide layer
Data Source
AI summary
A method for forming a gate oxide layer on a substrate is provided, in which a region of the substrate is defined out by a shallow trench isolation (STI) structure. An oxide layer covers over the substrate and a mask layer with an opening to expose oxide layer corresponding to the region with an interface edge of the STI structure. The method includes forming a silicon spacer on a sidewall of the opening. A cleaning process is performed through the opening to expose the substrate at the region. An oxidation process is performed on the substrate at the region to form the gate oxide layer, wherein the silicon spacer is also oxidized to merge to an edge of the gate oxide layer.