Gate Oxide Thickness Control for Multi-Voltage Memory Transistors

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Solution Overview

Problem

The existing manufacturing method for semiconductor devices with non-volatile memory and multiple types of field effect transistors having gate oxide films of different thicknesses is restrictive, as the formation of the gate oxide film for one transistor affects the manufacturing flow of others, limiting flexibility and efficiency.

Innovation Solution

A method is developed to form gate oxide films with specific thicknesses for each transistor type by etching and adjusting the upper layers of oxide films on a semiconductor substrate, allowing for independent control of film thickness without significantly impacting the formation of other transistors, using techniques like chemical dry etching and thermal oxidation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the gate oxide film of the novel MOS transistor is formed by CVD method after the floating gate electrode is formed, then the gate oxide film can be formed with controlled thickness, but the formation process greatly affects the manufacturing flow of other transistors including the high withstand voltage MOS transistor

Engineering Contradiction:
Improvegate oxide film thickness controlVSAvoidmanufacturing flow restrictions
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The gate oxide films for different transistor types are formed at different stages of the manufacturing process. The novel MOS transistor gate oxide film is formed first by CVD method, then the high withstand voltage MOS transistor gate oxide film is formed later by thermal oxidation method. This segmentation allows each transistor type to have its gate oxide film formed under optimized conditions without interfering with others.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate oxide film for the novel MOS transistor is formed in advance before the floating gate electrode is formed. This preliminary action allows the gate oxide film to be established as a foundation layer, and subsequent processing steps for other transistors can proceed without affecting this already-formed layer.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple types of field effect transistors with different gate oxide film thicknesses are integrated on a single chip, then device performance is optimized, but the manufacturing process becomes more restrictive and less flexible

Engineering Contradiction:
Improvetransistor type integrationVSAvoidmanufacturing process flexibility
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Different gate oxide film formation methods are applied to different transistor regions on the chip. The novel MOS transistor regions receive CVD-formed gate oxide films, while the high withstand voltage MOS transistor regions receive thermally oxidized gate oxide films. This local differentiation allows each region to have the properties needed for its specific transistor type while maintaining overall manufacturing flexibility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The manufacturing process is divided into separate stages for forming gate oxide films of different transistor types. By segmenting the process into distinct formation stages with different methods, the chip can accommodate multiple transistor types without creating a single restrictive manufacturing flow.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the simultaneous integration of transistors with different drive voltages on a single chip, optimizing performance by reducing standby current and voltage drop, while maintaining reliability and minimizing structural changes to existing components.

Implementation Method 1

an oxide film is first formed on a surface of a semiconductor substrate

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

a first etched film is formed on the oxide film. By removing the first etched film and a part of an upper layer of the oxide film

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

using techniques like chemical dry etching and thermal oxidation

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentUS11882697B2Method of manufacturing semiconductor device
Publication Date: 2024.01.23 RENESAS ELECTRONICS CORP
  • US11882697B2 patent drawing
  • US11882697B2 patent drawing
  • US11882697B2 patent drawing

AI summary

A non-volatile semiconductor memory and three or more types of transistors are provided. A thickness of a first gate oxide film of a first transistor is larger than that of a second gate oxide film of a second transistor, and is smaller than that of a third gate oxide film of a third transistor. In a first transistor region, a first silicon oxide film is formed on a surface of a semiconductor substrate, and second and third silicon oxide films are formed on the first silicon oxide film. By removing the second and third silicon oxide films and a part of an upper layer of the first silicon oxide film, the first gate oxide film is formed from the first silicon oxide film.