Gate Plugs Inducing Compressive Channel Strain

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Solution Overview

Problem

Integrated circuit devices face performance limitations due to insufficient transistor channel mobility, which hinders the optimization of device performance as feature sizes shrink in semiconductor technology.

Innovation Solution

The implementation of fin trim isolation (FTI) plugs with a compressive film is used to induce compressive strain in the active channel of transistors, enhancing channel mobility and transistor performance. These plugs are specifically designed for both NMOS and PMOS devices and are compatible with CMOS processes, applicable to non-planar transistors like FinFETs and gate-all-around transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If transistor size is shrunk to increase device density, then device capacity increases, but channel mobility deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidchannel mobility
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by introducing compressive strain specifically in the channel region through FTI plugs, while maintaining the overall scaled dimensions. The compressive film is localized to induce strain only where needed (in the channel), allowing density improvement without compromising channel mobility in the critical transport region.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameter of strain in the channel by introducing compressive strain through the FTI plug structure. This parameter change (from relaxed to compressed state) directly addresses the mobility degradation that occurs with scaling, allowing smaller transistors to maintain or improve channel mobility through controlled mechanical strain.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If compressive strain is induced in the channel to improve mobility, then channel mobility improves, but device structure complexity increases

Engineering Contradiction:
Improvechannel mobilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the device structure by introducing a separate FTI plug component distinct from the main transistor structure. This segmentation allows the compressive strain function to be added independently through a modular plug structure, rather than redesigning the entire transistor, thereby limiting the increase in overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The FTI plug acts as an intermediary element that mediates between the substrate and the channel. This intermediary structure provides the compressive strain function without requiring direct modification of the channel or gate structures, simplifying the overall implementation compared to integrating strain directly into the transistor components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The compressive strain from the FTI plugs improves transistor performance by increasing channel mobility, making them suitable for advanced semiconductor technologies such as 3D ferroelectric RAM and future technology nodes, enabling increased monolithic integration of backend logic and memory.

Implementation Method 1

the compressive film of the FTI plug exerts a compressive strain outward from the FTI plug

Methodology Applied
Scientific EffectCompressive strain: Compression

Data Source

PatentUS20230207696A1Integrated circuits with gate plugs to induce compressive channel strain
Publication Date: 2023.06.29 INTEL CORP
  • US20230207696A1 patent drawing
  • US20230207696A1 patent drawing
  • US20230207696A1 patent drawing

AI summary

Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to integrated circuits utilizing gate plugs to induce compressive channel strain. Other embodiments may be described or claimed.