Semiconductor Gate Protection Using a Breakdown Capacitor Path

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Solution Overview

Problem

The challenge is to form a low-withstand voltage capacitor using an insulating film formed in the same layer as the gate insulating film without partial thinning, while avoiding damage to the gate insulating film, which is very thin.

Innovation Solution

A semiconductor device is designed with a connection path using a capacitor where an insulating film formed in the same layer as the gate insulating film is sandwiched by a pair of electrodes and undergoes dielectric breakdown at a voltage lower than the gate insulating film's breakdown voltage, formed between at least one of the source/drain electrodes and the gate electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a low-withstand voltage capacitor is formed by thinning the insulating film in the same layer as the gate insulating film, then the capacitor can be formed without separate processes, but the gate insulating film is damaged due to its very thin structure

Engineering Contradiction:
Improvecapacitor formation processVSAvoidgate insulating film integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The insulating film is segmented into two distinct regions: a first insulating film region serving as the gate insulating film and a second insulating film region forming the capacitor dielectric. This segmentation allows each region to be optimized independently - the first region maintains its original thin structure for gate function while the second region is thinned to form the low-withstand voltage capacitor, eliminating the need to thin the gate insulating film itself.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different portions of the insulating film are given different properties: the first insulating film region maintains its original thickness and high dielectric strength for gate operation, while the second insulating film region is selectively thinned to create low-withstand voltage characteristics for plasma-induced damage release. This local differentiation resolves the contradiction by applying quality changes only where needed.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the gate insulating film is formed very thin to achieve stable device performance, then device performance is improved, but the film becomes susceptible to plasma-induced damage during manufacturing

Engineering Contradiction:
Improvedevice performance stabilityVSAvoidplasma-induced damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The second insulating film region acts as an intermediary protective layer between the plasma environment and the thin gate insulating film. This intermediate layer is deliberately thinned to create a low-withstand voltage capacitor that preferentially breaks down under plasma exposure, absorbing the harmful effects and protecting the gate insulating film from direct plasma-induced damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The potential harm of plasma exposure to the thin gate insulating film is converted into a beneficial mechanism: the thinned second insulating film region serves as a sacrificial element that undergoes controlled dielectric breakdown at lower voltage, releasing accumulated electric charge from conductive layer wiring and preventing more severe damage to the gate insulating film.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Object-affected harmful factors

If a capacitor is formed to release charged electric charge during plasma etching, then plasma-induced damage is reduced, but additional manufacturing processes are required

Engineering Contradiction:
Improveplasma-induced damageVSAvoidmanufacturing process steps
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The capacitor formation process is merged with the gate insulating film formation process. The same insulating film material and deposition conditions are used for both the first insulating film region (gate insulating film) and the second insulating film region (capacitor dielectric). This merging eliminates separate capacitor formation processes while still providing the plasma-induced damage protection function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The insulating film structure serves multiple functions simultaneously: it acts as the gate insulating film for device operation, forms a low-withstand voltage capacitor for charge release during plasma etching, and provides dielectric layers for both functions from a single formation process. This multi-functionality reduces manufacturing complexity while achieving both protection and operational requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows for the formation of a semiconductor device with stable performance by eliminating the need for partial thinning of the insulating film, thus protecting the gate insulating film from unnecessary damage and reducing the risk of plasma-induced damage during manufacturing.

Implementation Method 1

a connection path using a capacitor in which an insulating film formed in the same layer as the gate insulating film is sandwiched by a pair of electrodes and that undergoes dielectric breakdown at a voltage lower than a dielectric breakdown voltage of the gate insulating film

Methodology Applied
Scientific EffectDielectric breakdown: Avalanche Breakdown

Data Source

PatentUS12283592B2Semiconductor device and electronic equipment
Publication Date: 2025.04.22 SONY SEMICON SOLUTIONS CORP
  • US12283592B2 patent drawing
  • US12283592B2 patent drawing
  • US12283592B2 patent drawing

AI summary

A semiconductor device includes a semiconductor material layer forming a channel layer, a pair of source/drain electrodes formed on the semiconductor material layer, and a gate electrode arranged between the pair of source/drain electrodes and formed on the semiconductor material layer via a gate insulating film. The semiconductor device further includes a connection path using a capacitor in which an insulating film formed in the same layer as the gate insulating film is sandwiched by a pair of electrodes. The capacitor undergoes dielectric breakdown at a voltage lower than a dielectric breakdown voltage of the gate insulating film is formed between at least one of the pair of source/drain electrodes and the gate electrode.