Gate Structure Protection in Semiconductor Fabrication
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Solution Overview
Problem
In semiconductor manufacturing, the formation of mushroom-shaped defects during the high-K/metal gate last process can deteriorate the performance of semiconductor devices due to the thinness of the mask layer, leading to increased leakage currents and power waste, especially when forming stress layers for NMOS and PMOS devices.
Innovation Solution
A method involving the formation of a first protective portion on the mask layer after creating pocket regions, which protects the top surfaces of the gate structures during the formation of doped source/drain regions, preventing mushroom-shaped defects and ensuring proper ion implantation by maintaining a balanced depth-to-width ratio of the trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a thin mask layer is used during high-K/metal gate last process, then the critical dimension control is improved, but mushroom-shaped defects are formed on gate structures
Solution Approach 1:
The patent forms a protective layer on the gate structure before forming the source/drain regions. This preliminary protective action prevents the mask layer from directly contacting and interacting with the source/drain regions during fabrication, thereby avoiding mushroom-shaped defects while maintaining thin mask layer benefits for critical dimension control.
Solution Approach 2:
The protective layer acts as an intermediary between the mask layer and the gate structure. It provides physical separation and protection, allowing the thin mask layer to be used for precise critical dimension control without causing defects on the gate structure during subsequent processing steps.
2Manufacturing precision
If the mask layer is made thinner for better CD control, then manufacturing precision is improved, but leakage currents increase due to defects
Solution Approach 1:
The protective layer is formed in advance to prevent mushroom-shaped defects during source/drain region formation. By preventing these defects, the thin mask layer can be used for better critical dimension control without causing the leakage current issues that would otherwise result from defect-induced performance deterioration.
Solution Approach 2:
The protective layer acts as an intermediary that decouples the relationship between mask layer thickness and device performance. It allows the use of thin mask layers for precise CD control while preventing the formation of defects that would lead to increased leakage currents, thus resolving the trade-off between manufacturing precision and energy loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of semiconductor structures by preventing defects, improving carrier mobility, and reducing power waste, while allowing for effective formation of pocket regions and doped source/drain regions without compromising the quality of the gate structures.
Implementation Method 1
forming doped source/drain regions in the base substrate and portions of the pocket regions at both sides of the gate structure
Data Source
AI summary
Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate; forming a gate structure over the base substrate; forming a mask layer on a top surface of the gate structure; forming pocket regions in the base substrate at both sides of the gate structure; after forming the pocket regions, forming a first protective portion covering a top surface of the mask layer and protruding from sidewall surfaces of the gate structure; and after forming the first protective portion, forming doped source/drain regions in the base substrate and portions of the pocket regions at both sides of the gate structure.