Gate Pulse Modulation Circuit for LCD Flicker Reduction

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Solution Overview

Problem

Existing liquid crystal display devices experience flickers due to unstable charging characteristics and defects like vertical lines, particularly when using the overlapping driving method with a single clock signal, which limits simultaneous modulation of odd-numbered and even-numbered gate lines.

Innovation Solution

A circuit generating gate pulse modulation signals using two clock signals with different phases, where one signal is applied to odd-numbered lines and the other to even-numbered lines, with level shifters to produce modulated clock signals for each, ensuring overlapping and stable gate output signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single clock signal is used for overlapping driving method, then the gate driver can be operated in synchronization, but the charging characteristics become unstable and cause display defects

Engineering Contradiction:
Improvecharging stabilityVSAvoiddisplay defects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The single clock signal is segmented into two separate clock signals with different phases. The first clock signal controls odd-numbered gate lines while the second clock signal controls even-numbered gate lines, allowing independent optimization of charging characteristics for each group and eliminating the instability caused by single-signal overlapping driving.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If a single clock signal is used, then the circuit structure remains simple, but simultaneous modulation of odd-numbered and even-numbered gate lines is not possible

Engineering Contradiction:
Improvesimultaneous modulation capabilityVSAvoidcircuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The gate driver circuit is segmented into multiple independent modulation units, each receiving a dedicated clock signal. This allows odd-numbered and even-numbered gate lines to be modulated simultaneously with different timing characteristics, achieving full adaptability while maintaining relatively simple circuit architecture through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit introduces dynamic phase control by using two clock signals with different phases. This dynamic approach enables flexible modulation of different gate line groups, allowing the system to adapt to various driving requirements without significantly increasing circuit complexity.

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If gate modulation is made only at the middle portion of the gate output signal, then the circuit operation is simplified, but the desired output waveform cannot be obtained

Engineering Contradiction:
Improveoutput waveform precisionVSAvoidmodulation circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The modulation process is segmented into multiple stages distributed across different parts of the gate output signal waveform. By applying modulation at multiple points rather than only at the middle portion, the circuit achieves precise waveform control while keeping each individual modulation stage relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of concentrating all modulation action at a single point (middle portion), the circuit applies partial modulation actions at multiple points throughout the gate output signal. This distributed approach achieves the desired waveform precision without requiring excessive complexity in any single modulation stage.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7817172B2Circuit for generating gate pulse modulation signal and liquid crystal display device having the same
Publication Date: 2010.10.19 LG DISPLAY CO LTD
  • US7817172B2 patent drawing
  • US7817172B2 patent drawing
  • US7817172B2 patent drawing

AI summary

A circuit for generating a gate pulse modulation signal includes a gate pulse modulation unit for generating two gate ON voltage modulation signals by using two clock signals each having a different phase, a level shift unit for generating level-shifted and modulated clock signals of odd-numbered and even-numbered lines by using the gate ON voltage modulation signal, and a GIP for receiving the clock signals of the odd-numbered and even-numbered lines and outputting the clock signals to each corresponding gate line.