Integrated Gate Resistor-Capacitor Layout for Common-Gate Amplifiers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Single-stage field-effect transistor amplifiers, particularly common-gate amplifiers, require large-sized capacitors, which occupy significant space and increase the overall size of semiconductor devices.

Innovation Solution

Integrating a resistor and capacitor within a semiconductor device by utilizing the gate as both a resistor and the top electrode of the capacitor, with an oxide layer as the insulation layer, reducing the physical size by combining these components into a single structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a common-gate amplifier uses a large-sized capacitor, then the capacitor can provide sufficient capacitance for the amplifier operation, but the overall device size increases significantly

Engineering Contradiction:
Improvecapacitor performanceVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the capacitor with the transistor structure by using the transistor's source region as the capacitor electrode and the substrate as the other electrode, eliminating the need for a separate large-sized capacitor while maintaining sufficient capacitance for amplifier operation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The source region serves dual functions: as the input terminal of the common-gate amplifier and as one electrode of the capacitor, allowing the same structure to fulfill multiple circuit functions and reduce overall device area

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate resistor and capacitor components are integrated into the semiconductor device, then the device functionality is enhanced, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines the resistor and capacitor into a single integrated structure where the gate serves as the resistor and the capacitor is formed using the source region and substrate, reducing the number of discrete components while maintaining enhanced functionality

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate structure serves multiple functions simultaneously: as the resistive element for biasing, as the top electrode of the capacitor, and as the control terminal for the transistor, thereby enhancing device functionality without proportionally increasing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The integrated design minimizes the area and volume occupied by the resistor and capacitor, leading to a smaller semiconductor device with reduced costs and enhanced performance in radio frequency circuits.

Implementation Method 1

an oxide layer disposed between the gate and the substrate

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

The doped regions are disposed in the first well and are connected to the ground

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20260020262A1Semiconductor device
Publication Date: 2026.01.15 UNITED MICROELECTRONICS CORP
  • US20260020262A1 patent drawing
  • US20260020262A1 patent drawing
  • US20260020262A1 patent drawing

AI summary

A semiconductor device including a resistor and a capacitor is provided. The capacitor includes a top electrode and a bottom electrode. The semiconductor device further includes a substrate, a first well, at least two doped regions, at least one gate and at least one oxide layer. The substrate serves as the bottom electrode of the capacitor. The first well is disposed in the substrate. The doped regions are disposed in the first well and are connected to the ground. The gate is disposed in the substrate and serves as the resistor and the top electrode of the capacitor. The oxide layer is disposed between the gate and the substrate.