Gate Resistor Layout for Stable Resistance in Power Semiconductors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional lumped gate resistors in power semiconductor devices exhibit significant resistance variations due to manufacturing tolerances, affecting device performance, as their resistance values depend on length, width, and sheet resistance, making it difficult to maintain precise resistance values.

Innovation Solution

The implementation of a lumped gate resistor design where the gate current flows from an inner contact to an outer contact, with the outer contact enclosing the inner contact within an inactive area, reducing variability by depending only on the sheet resistance and the gap width between the contacts, and featuring a dielectric pattern that forces the current through a semiconductor layer with a specific shape, such as an elliptical ring, to control resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional lumped gate resistor is implemented in power semiconductor devices, then the gate resistance can be increased to limit switching speed and reduce electrical ringing, but the resistance values exhibit significant variation due to manufacturing tolerances

Engineering Contradiction:
Improveperformance consistencyVSAvoidresistance value variation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The gate resistor is segmented into multiple identical resistor elements arranged in parallel between the gate pad and gate fingers. Each resistor element has the same dimensions and is formed from the same material layer, ensuring identical resistance values. This segmentation approach reduces the impact of manufacturing tolerances on individual resistors and provides better control over the total gate resistance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating multiple localized resistor elements distributed across the gate structure rather than a single lumped resistor. Each resistor element is positioned locally between the gate pad and gate fingers, allowing for uniform electrical path lengths and consistent resistance characteristics across all elements, thereby reducing overall resistance variation.

Inventive Principle:
Principle #3Local quality

2Reliability

If the gate resistance is increased by adding a discrete gate resistor, then switching speed can be limited and electrical ringing reduced, but the device size increases

Engineering Contradiction:
Improveelectrical ringing reductionVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The gate resistor elements are merged into the existing gate structure by forming them as integral parts of the gate electrode system. The resistor elements are created using the same gate electrode material layers that already exist in the power semiconductor device, eliminating the need for separate discrete resistor components and reducing overall device area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate electrode structure serves multiple functions: it provides the gate control function while simultaneously incorporating the resistor elements for switching speed control and electrical ringing reduction. This multi-functionality eliminates the need for separate dedicated resistor components, thereby reducing device area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If a lumped gate resistor is implemented to control switching characteristics, then the gate resistance increases, but the resistance value varies significantly affecting performance

Engineering Contradiction:
Improveswitching speed controlVSAvoidresistance value consistency
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The single lumped gate resistor is segmented into multiple identical resistor elements with equal dimensions and material properties. Each element has the same length, width, and sheet resistance, ensuring consistent resistance values. The total gate resistance is the parallel combination of these identical elements, providing predictable and consistent switching characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of resistance value consistency by using multiple identical resistor elements with controlled dimensions rather than a single variable resistor. By controlling the length, width, and sheet resistance of each element to be identical, the total resistance becomes more predictable and less sensitive to manufacturing variations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design minimizes resistance variations due to manufacturing tolerances, ensuring consistent gate resistance values and improving device performance by reducing the impact of manufacturing inaccuracies on the gate resistance, allowing for tighter control over the resistance value.

Implementation Method 1

The gate structure has a distributed gate resistance, which is a function of the length of the electrical path from the gate bond pad (or other gate terminal) to the gate finger of each individual unit cell and the sheet resistance of the materials forming the gate structure.

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS20230268407A1Semiconductor devices having gate resistors with low variation in resistance values
Publication Date: 2023.08.24 WOLFSPEED INC
  • US20230268407A1 patent drawing
  • US20230268407A1 patent drawing
  • US20230268407A1 patent drawing

AI summary

Power semiconductor devices include a semiconductor layer structure comprising an active area with a plurality of unit cell transistors and an inactive gate pad area, a gate resistor layer on an upper side of the semiconductor layer structure, an inner contact that is directly on the upper side of the gate resistor layer, and an outer contact that is directly on the upper side of the gate resistor layer. The outer contact encloses the inner contact within the inactive gate pad area of the semiconductor device.