Gate Line Separation with Etch Stop Protection of Interlayer Insulation
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is the loss of interlayer insulating layers during the gate line cutting process, which affects the reliability and stability of integrated circuit devices due to the short channel effect and decreasing design rules.
Innovation Solution
A method involving the formation of an etch stop layer using a pyrolysis material layer to protect the upper region of the interlayer insulating layer, preventing its loss during the gate separation process, while selectively removing the gate electrode, thereby maintaining the integrity of the interlayer insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of moving object
If gate line cutting is performed to separate gate lines, then gate line separation is achieved, but interlayer insulating layer is lost
Solution Approach 1:
An etch stop layer is formed on the interlayer insulating layer before the gate line cutting process. This preliminary action creates a protective barrier that prevents the interlayer insulating layer from being lost during subsequent etching steps, while still allowing the gate lines to be separated as needed.
Solution Approach 2:
The etch stop layer acts as an intermediary between the interlayer insulating layer and the etching process. It mediates the interaction by providing a sacrificial layer that protects the underlying interlayer insulating layer from direct exposure to the etchant, thus preventing material loss while enabling gate line separation.
2Ease of manufacture
If conventional gate cutting is used, then manufacturing process is simple, but interlayer insulating layer integrity is compromised
Solution Approach 1:
The etch stop layer is formed in advance using a spin coating process followed by pyrolysis, adding only a couple of simple steps before the existing gate cutting process. This maintains manufacturing simplicity while significantly improving interlayer insulating layer integrity by preventing material loss during cutting operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the loss of the interlayer insulating layer, ensuring stable subsequent processes and facilitating the formation of contact structures by maintaining the interlayer insulating layer's integrity, thus enhancing the reliability of semiconductor devices.
Implementation Method 1
forming an etch stop layer using a pyrolysis material layer
Implementation Method 2
a source material of the etch stop layer adsorbed on the pyrolysis material pattern is removed along with the decomposition of the pyrolysis material pattern
Data Source
AI summary
A method of manufacturing a semiconductor device, includes forming a mask layer on a semiconductor structure having a plurality of gate lines and a plurality of intergate insulating portions, forming an opening that exposes a cut region of the plurality of gate lines in the mask layer, forming a separation hole by removing a portion of a gate capping layer exposed by the opening, forming a pyrolysis material pattern in the separation hole, forming an etch stop layer on an upper surface of the mask layer and on a side wall portion of the separation hole from which the pyrolysis material pattern is removed, while the pyrolysis material pattern is decomposed and removed, and removing a portion of the gate electrode exposed by the separation hole using the etch stop layer.