Gate Shutdown Signal Circuit for Stable LCD Panel Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing gate shutdown signal generation circuits in liquid crystal display devices face instability issues due to poorly designed timing signals, leading to excessive power consumption and potential panel damage from abnormal operation.
Innovation Solution
A shutdown signal generation circuit on an array substrate, comprising a first and second switch with opposite control end polarities, where the first switch is turned on at a high electric potential and the second switch is turned on at a low electric potential, with a logic unit adjusting these potentials to maintain a stable gate shutdown signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate shutdown signal is generated using two timing signals with 1/2 period time delay and related logic modules, then the gate shutdown signal can be generated, but the signal cannot be kept at a fixed value for a long time, causing operation confusion and excessive power consumption
Solution Approach 1:
The circuit is divided into two separate switches (first switch and second switch) that operate in complementary fashion. Each switch handles one half of the signal generation duty, allowing the output to be maintained at a stable fixed value without requiring complex timing signal coordination. This segmentation resolves the instability issue while preventing excessive power consumption by ensuring only one switch is actively charging/discharging at any given time.
Solution Approach 2:
Instead of using the conventional approach of generating the shutdown signal through logic modules processing timing signals, this invention inverts the approach by directly controlling switch states to produce the desired signal waveform. The control signal directly governs the complementary switching actions, reversing the traditional signal generation methodology to achieve better stability and lower power consumption.
2Ease of manufacture
If the gate shutdown signal is generated using conventional timing signals, then the signal can be produced, but abnormal operation of the panel may be caused and the panel may be damaged
Solution Approach 1:
The complementary switch design inherently prevents abnormal operations before they can occur. By ensuring that one switch is always off when the other is on, and that both switches have opposite control end polarities, the circuit design built-in protection against the timing signal issues that could cause panel damage. This prior cushioning approach eliminates the harmful effects before they can affect the panel.
Solution Approach 2:
The control signal acts as an intermediary that coordinates the complementary switching actions of the first and second switches. Rather than directly using potentially problematic timing signals, the control signal mediates the switching process, ensuring that switches transition in a controlled manner that prevents abnormal operations and panel damage while maintaining manufacturing simplicity.
Data Source
AI summary
This application provides a shutdown signal generation circuit and a display apparatus. The shutdown signal generation circuit includes: a first switch, where a first end of the first switch is electrically coupled to a first frequency, a control end of the first switch is electrically coupled to a first node, and a second end of the first switch is electrically coupled to a second node; and a second switch, wherein a first end of the second switch is electrically coupled to a second frequency, a control end of the second switch is electrically coupled to the first node, and a second end of the second switch is electrically coupled to the second node, where the first node is electrically coupled to a control signal, and the second node electrically outputs a gate shutdown signal.