Semiconductor Gate Sidewall Formation via Segmented Oxidation
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Solution Overview
Problem
Conventional methods for miniaturizing insulated gate field effect transistors (MIS transistors) face challenges in achieving a desirable sidewall shape and maintaining precise impurity region distances due to thin insulating films, leading to fluctuations in film thickness and etching issues, which affect the transistor's properties.
Innovation Solution
A method involving the sequential lamination of insulating films and silicon films on a semiconductor substrate, where a first silicon oxide film is formed as a mask to create a thin sidewall, and a thicker sidewall insulating film is used to form high concentration impurity regions, ensuring precise control over impurity layer distances and maintaining a stable transistor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If a thin insulating film is used to form sidewalls for miniaturized MIS transistors, then the transistor size is reduced, but the sidewall shape becomes unstable and film thickness fluctuates
Solution Approach 1:
The patent divides the sidewall formation into two separate stages: first forming a preliminary sidewall using a thin insulating film, then forming a final sidewall using a thicker insulating film deposited on the preliminary sidewall. This segmentation allows the thin film to define the basic structure while the thick film provides the stable, precise final shape, resolving the contradiction between miniaturization and manufacturing precision.
Solution Approach 2:
The patent performs preliminary sidewall formation using a thin insulating film before finalizing the sidewall shape. The preliminary sidewall serves as a foundation that is later refined by depositing an additional thick insulating film, ensuring both miniaturization capability and precise final dimensions are achieved.
2Speed
If conventional anisotropic etching is used on thin insulating films, then etching speed is maintained, but reaction products redeposit on the film causing bottom spreading
Solution Approach 1:
The patent segments the sidewall structure into two parts: a preliminary sidewall formed by conventional etching, and a final sidewall formed by depositing a thick insulating film. This segmentation eliminates the redeposition problem by avoiding continued etching of the thin film, while still achieving the desired etching speed in the preliminary stage.
Solution Approach 2:
The preliminary sidewall acts as an intermediary structure that is later covered by the thick insulating film. This intermediary structure allows conventional etching to proceed at high speed initially, while the subsequent thick film deposition prevents further redeposition issues and provides the final precise shape.
3Length of moving object
If the silicon nitride film is made thin for miniaturization, then transistor size is reduced, but the film cannot properly function as an etch stopper
Solution Approach 1:
The patent segments the protective function into two layers: a thin silicon nitride film that provides oxidation resistance, and a thick insulating film that provides etch stopping capability. This segmentation allows the silicon nitride film to be thin for miniaturization while the thick film ensures reliable etch stopping.
Solution Approach 2:
The patent uses a composite structure combining silicon nitride and silicon oxide films with different thicknesses. The thin silicon nitride layer provides oxidation resistance while the thick silicon oxide layer provides etch stopping, creating a composite protective system that satisfies both miniaturization and reliability requirements.
4Manufacturing precision
If a thick insulating film is used as sidewall mask, then etching stability is improved, but the distance between gate electrode and impurity region increases
Solution Approach 1:
The patent segments the sidewall into a thin preliminary sidewall that defines the critical distance dimensions, and a thick final sidewall that provides etching stability. The preliminary sidewall ensures precise spacing while the thick final sidewall provides process stability without increasing the critical dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the stable formation of MIS transistors with constant impurity region distances, preventing etching errors and achieving a desirable extension structure, facilitating miniaturization and high integration without chip size increase.
Implementation Method 1
oxidizing the silicon film to transform it into a first silicon oxide film
Data Source
AI summary
Disclosed is a method of manufacturing a semiconductor device, comprising forming a gate electrode on a main surface of a semiconductor substrate via a gate insulating film, laminating sequentially a first insulating film with oxidation resistance and a silicon film on the main surface of the semiconductor substrate on which the gate electrode is formed, eliminating selectively the silicon film except for a side face of the gate electrode, and oxidizing the silicon film to transform it into a first silicon oxide film, eliminating the first insulating film on the main surface of the semiconductor substrate by using the first silicon oxide film as a mask, and then forming a first impurity layer on the main surface of the semiconductor substrate, laminating a sidewall insulating film thicker than the first silicon oxide film on the side face of the gate electrode on which the first silicon oxide film is formed, and forming a second impurity layer which has the same conduction type as that of the first impurity layer and has impurity concentration higher than that of the first impurity layer close to the first impurity layer by using the sidewall insulating film as a mask.