Gate Sidewall Spacer Formation Preventing Source Drain Recessing

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Solution Overview

Problem

The existing methods for manufacturing semiconductor devices result in higher than desired run-to-run variability in current leakage due to variable recessing in the source and drain regions caused by damage to the oxide layer during dopant implantation and subsequent trim-back processes.

Innovation Solution

A method involving the removal of a first oxide layer and replacement with a second oxide layer before the silicon nitride sidewall trim-back process, which minimizes dopant diffusion and prevents recess formation by using a low thermal budget and selective deposition techniques, ensuring the second oxide layer is densified and impervious to etchants.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the oxide layer is used as an etch-stop during silicon nitride sidewall formation, then the gate structure can be properly formed, but the oxide layer gets damaged during dopant implantation causing variable recessing in source and drain regions

Engineering Contradiction:

Improvegate structure formation precisionVSAvoidcurrent leakage consistency

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent divides the oxide layer into two separate layers: a first oxide layer that serves as the etch-stop during sidewall formation, and a second oxide layer that is deposited afterward to protect the source and drain regions. This segmentation allows each layer to perform its specific function without interfering with the other, preventing the damage and variable recessing that occurs when a single oxide layer is used for both purposes

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs the removal of the first oxide layer and deposition of the second oxide layer before the trim-back process. This preliminary action ensures that the source and drain regions are protected from etchant penetration before the silicon nitride sidewalls are trimmed, preventing recessing and ensuring consistent device performance

Inventive Principle:

Principle #10Preliminary action

2Area of stationary object

If the silicon nitride sidewalls are trimmed back after dopant implantation, then the space between gate structures is increased, but this causes recessing into the substrate due to etchant diffusion through damaged oxide

Engineering Contradiction:

Improvespace between gate structuresVSAvoidsource and drain region flatness

Core Design Contradiction:

Area of stationary objectVSManufacturing precision

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The second oxide layer acts as an intermediary protective barrier between the etchant used in the trim-back process and the source and drain regions. This intermediary layer prevents the etchant from diffusing through the damaged first oxide layer and causing recessing, while still allowing the trim-back process to proceed to increase the space between gate structures

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces run-to-run variability in current leakage by preventing substrate recessing and ensuring consistent device performance by maintaining a non-recessed surface for metal silicide electrode formation.

Implementation Method 1

depositing a second oxide layer selectively on the exposed source and drain regions

Methodology Applied

Scientific EffectSelective deposition: Deposition (physical)

Implementation Method 2

The first oxide layer is configured as an etch-stop for forming silicon nitride sidewall spacers

Methodology Applied

Scientific EffectEtch-stop: Diffusion Barrier

Data Source

PatentUS7514331B2Method of manufacturing gate sidewalls that avoids recessing

Publication Date: 2009.04.07 TEXAS INSTRUMENTS INC

AI summary

A method of manufacturing a semiconductor device comprising removing a first oxide layer deposited over a semiconductor substrate, thereby exposing source and drain regions of the substrate. The first oxide layer is configured as an etch-stop for forming silicon nitride sidewall spacers of a gate structure located adjacent to the source and drain regions. The method further comprises depositing a second oxide layer selectively on the exposed source and drain regions and then removing lateral segments of the silicon nitride sidewall spacers.