Gate Spacer Formation with In-Situ Annealed Nitride Layer
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Solution Overview
Problem
Conventional semiconductor technologies face challenges with polysilicon gate electrodes due to performance degradation from boron penetration and depletion effects, and the formation of spacers during etching can damage interfacial and high-k dielectric layers.
Innovation Solution
A method involving the deposition of a nitride layer followed by in-situ annealing and anisotropic etching to form a spacer with an extended bottom width, reducing the risk of damage to the interfacial and high-k dielectric layers by densifying the nitride layer before etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional polysilicon is used to form gate electrode, then manufacturing process is simple, but device performance degrades due to boron penetration and depletion effect
Solution Approach 1:
The patent changes the material parameter from polysilicon to metal gate materials (such as tungsten, molybdenum, or their nitrides) to eliminate boron penetration and depletion effects. This material substitution resolves the performance degradation issue while maintaining manufacturing feasibility through established deposition and patterning processes.
2Manufacturing precision
If over-etching is performed during spacer formation, then complete pattern transfer is achieved, but undercut profile forms at the bottom portion of the spacer
Solution Approach 1:
The patent applies preliminary action by performing in-situ annealing on the nitride layer before etching to densify it. This pre-treatment modifies the nitride layer's physical properties, making it more resistant to over-etching and preventing undercut profile formation while still allowing complete pattern transfer.
Solution Approach 2:
The patent changes the physical state parameter of the nitride layer by densifying it through in-situ annealing. This parameter change increases the layer's etch resistance, enabling better profile control during the etching process and preventing the formation of undercut profiles.
3Manufacturing precision
If in-situ annealing is performed to densify the nitride layer, then spacer bottom width increases, but process temperature must be raised above 700° C.
Solution Approach 1:
The patent merges the annealing process with the existing deposition chamber, performing in-situ annealing without transferring the substrate to a separate furnace. This integration allows precise temperature control and combines two process steps into one workflow, achieving the necessary densification while managing thermal budget efficiently.
4Productivity
If etching gases penetrate through the spacer, then complete etching is achieved, but damage occurs to the interfacial layer or high-k dielectric layer under the gate structure
Solution Approach 1:
The patent applies preliminary action by densifying the nitride layer through in-situ annealing before the etching process. This pre-treatment creates a more robust barrier that prevents etching gases from penetrating through the spacer and damaging underlying layers, while still allowing the etching to proceed efficiently.
Solution Approach 2:
The densified nitride layer acts as a protective cushion or barrier layer that absorbs or blocks the harmful penetration of etching gases. This beforehand protection prevents damage to the interfacial layer and high-k dielectric layer while maintaining etching productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces the risk of damage to the interfacial and high-k dielectric layers during etching by producing a spacer with a larger bottom width, enhancing the structural integrity and performance of semiconductor devices.
Implementation Method 1
performing an in-situ annealing process to the nitride layer
Implementation Method 2
to densify the nitride layer right
Data Source
AI summary
A method for forming a semiconductor structure includes forming a gate structure on a substrate, performing a deposition process to form a nitride layer to cover the substrate and the gate structure, performing an in-situ annealing process to the nitride layer, and performing an anisotropic etching process to the nitride layer after the in-situ annealing process to form a spacer on a sidewall of the gate structure.