Replacement Gate Spacer Trimming to Prevent Antenna Defects
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Solution Overview
Problem
Damage and defects occur in gate structures of fin field effect transistors (finFETs) during the formation of gate contacts due to the geometry and shape of layers and structures, leading to antenna defects and reduced semiconductor device yield.
Innovation Solution
Implementing a radical surface treatment (RST) to etch spacer layers on dummy gate structures before the replacement gate process, using plasma-generated radicals to modify the shape and geometry of remaining spacer layers, thereby reducing the likelihood of antenna defects and improving transistor reliability and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional etching processes are used to form gate contacts, then gate contacts can be formed, but antenna defects occur due to the geometry and shape of layers and structures
Solution Approach 1:
The patent applies preliminary action by performing radical surface treatment on spacer layers before the replacement gate process. This pre-treatment modifies the shape and geometry of spacer layers in advance, preventing antenna defects from forming during subsequent gate contact formation. The RST operation is conducted proactively to eliminate the root cause of defects before they can occur during normal processing.
Solution Approach 2:
The patent changes physical and chemical parameters of spacer layers through radical surface treatment. The RST process modifies surface properties, composition, and geometry of spacer layers, transforming them from a defect-prone state to a protected state that resists antenna defect formation during etching operations.
2Productivity
If spacer layers are not trimmed before replacement gate process, then manufacturing is simpler, but antenna defects occur reducing device yield
Solution Approach 1:
The RST operation is performed as a preliminary step before the replacement gate process to prevent antenna defects. By proactively treating spacer layers in advance, the patent eliminates the need for complex defect correction procedures later, thereby improving device yield without significantly increasing overall process complexity.
Solution Approach 2:
The patent converts the potentially harmful effect of spacer layer geometry into a benefit by using RST to deliberately modify the spacer layer shape. This controlled modification transforms what would normally be a defect source into a protective feature that prevents antenna defects during subsequent processing.
3Manufacturing precision
If dummy gate structures are used, then gate structures can be formed, but defects occur during gate contact formation due to geometry and shape
Solution Approach 1:
The patent applies local quality by performing RST specifically on spacer layers in critical areas where antenna defects are most likely to form. Rather than treating the entire structure uniformly, the RST operation is targeted at specific locations and layers, providing localized protection where it is most needed while maintaining manufacturing precision.
Solution Approach 2:
The RST operation is conducted in advance of gate contact formation to prevent defects in dummy gate structures. By proactively modifying spacer layer properties before the replacement gate process, the patent ensures that gate structures are formed with higher precision and fewer defects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The RST operation minimizes the occurrence of defects in replacement gate structures, enhancing the reliability and yield of semiconductor devices by reducing the risk of antenna defects during subsequent processing operations.
Implementation Method 1
Implementing a radical surface treatment (RST) to etch spacer layers on dummy gate structures before the replacement gate process, using plasma-generated radicals to modify the shape and geometry of remaining spacer layers
Data Source
AI summary
Spacer layers on sidewalls of a dummy gate structure included in a semiconductor device are trimmed or etched prior to or during a replacement gate process in which the dummy gate structure is replaced with a replacement gate structure. A radical surface treatment operation is performed to etch the spacer layers, which is a type of plasma treatment in which radicals are generated using a plasma. The radicals in the plasma are used to etch the spacer layers such that the shape and/or the geometry of the remaining portions of the spacer layers reduces, minimizes, and/or prevents the likelihood of an antenna defect being formed in the spacer layers and/or in a work function metal layer of the replacement gate structure. This reduces, minimizes, and/or prevents the likelihood of occurrence of damage and/or defects in the replacement gate structure in subsequent processing operations for the semiconductor device.