Semiconductor Gate Spacer Capping Layer Blocks Leakage Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices, such as FinFETs, experience leakage current issues due to step differences between fin bodies and device isolation layers, leading to electrical connections between gate assemblies and epitaxial regions.
Innovation Solution
The semiconductor device incorporates a gate assembly with a spacer capping layer having etch selectivity, surrounded by an air gap and additional spacer capping layers, which prevent electrical connections by creating a barrier between the gate assembly and epitaxial regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate assembly structure is used, then the device structure is simple, but leakage current occurs between the gate assembly and epitaxial region due to step differences
Solution Approach 1:
The patent introduces an air gap as an intermediary barrier between the gate assembly and the epitaxial region. This air gap physically separates the two components, preventing direct electrical contact and blocking leakage current paths that would otherwise occur due to step differences in the conventional structure.
Solution Approach 2:
The gate assembly structure is segmented into multiple distinct components: the gate assembly itself, the air gap, and the spacer capping layer. This segmentation creates discrete functional zones where the air gap serves as an electrical isolation barrier, preventing the leakage current issue while maintaining structural integrity.
2Ease of manufacture
If the gate assembly is placed directly on the device isolation layer, then the manufacturing process is simple, but electrical connection occurs between the gate assembly and epitaxial region
Solution Approach 1:
The air gap acts as an intermediary layer between the gate assembly and the underlying structures. This intermediary barrier maintains electrical isolation while allowing the gate assembly to be positioned on the device isolation layer, thus preserving ease of manufacture while preventing harmful electrical connections.
Solution Approach 2:
The spacer capping layer functions as a thin film structure that caps the air gap and provides additional electrical isolation. This thin film approach maintains the simplicity of the manufacturing process while ensuring reliable electrical isolation between the gate assembly and epitaxial region.
3Reliability
If no barrier structure is added, then the device structure remains simple, but leakage current cannot be blocked between gate assembly and epitaxial region
Solution Approach 1:
The air gap serves as a natural intermediary barrier that blocks leakage current without requiring complex additional structures. By utilizing the physical separation created by the air gap, the patent achieves reliable leakage current blocking while minimizing the addition of complex barrier structures.
Solution Approach 2:
The spacer capping layer is implemented as a thin film structure that provides the necessary barrier function for blocking leakage current. This thin film approach achieves the required reliability improvement while adding minimal structural complexity compared to bulk barrier materials.
Data Source
AI summary
A semiconductor device includes a gate assembly disposed on a device isolation layer, a gate spacer disposed on a side surface of the gate assembly, a contact assembly disposed on the gate spacer, an air gap disposed between the device isolation layer and the contact assembly, and a first spacer capping layer disposed between the gate spacer and the air gap. The first spacer capping layer has an etch selectivity with respect to the gate spacer.