Gate Spacer Sidewall Control in Radical Dummy Gate Etching
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the formation of non-straight sidewall profiles in gate spacers during the removal of polysilicon gates, which affects the uniformity of metal gate performance in advanced process nodes.
Innovation Solution
A selective radical etching process is employed to remove dummy gate stacks, utilizing radicals as etchants and excluding charged ions to maintain a straight sidewall profile of the gate spacer, thereby avoiding ion bombardment and its associated damages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to remove polysilicon gates, then the gate removal is achieved, but the gate spacer sidewall profile becomes non-straight
Solution Approach 1:
The patent extracts and removes the harmful charged ions from the etching process by using a radical-based etching mechanism instead of conventional plasma etching. This is achieved by introducing a vapor-phase etchant that reacts selectively with the polysilicon gate material through radical chemistry, eliminating ion bombardment damage to the gate spacer sidewalls while maintaining effective gate removal
Solution Approach 2:
The patent changes the chemical parameters of the etching process by transitioning from a plasma-based process to a vapor-phase radical etching process. This involves modifying the etchant delivery method, reaction chemistry, and process conditions to generate highly reactive radical species that can selectively etch polysilicon without the harmful effects of ion bombardment, thereby preserving sidewall profile straightness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of gate structure performance by maintaining a substantially straight sidewall profile and integrates well with existing fabrication processes.
Implementation Method 1
A selective radical etching process is employed to remove dummy gate stacks, utilizing radicals as etchants and excluding charged ions to maintain a straight sidewall profile of the gate spacer
Data Source
AI summary
A semiconductor device includes a substrate, a semiconductor channel region over the substrate, a gate stack engaging the semiconductor channel region, and a gate spacer extending on a sidewall of the gate stack. The gate spacer includes an inner sidewall interfacing the gate stack and an outer sidewall opposing the inner sidewall. In a cross-sectional view along a lengthwise direction of the semiconductor channel region the inner sidewall has a footing structure in a bottom portion of the inner sidewall. The footing structure extends towards the gate stack. The semiconductor device also includes a source/drain feature abutting the semiconductor channel region and a dielectric layer on the source/drain feature. A top surface of the dielectric layer is declined towards its center.