Gate Spacer Profiling for SAB Removal in Dense Semiconductor Structures

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Solution Overview

Problem

As the distance between gates shortens, it becomes difficult to remove the salicide blocking (SAB) layer in the predetermined region for forming metal silicide, leading to poor formation of the metal silicide.

Innovation Solution

The semiconductor structure and manufacturing method involve forming gate structures with spacers, where a protective layer is used to expose and remove the upper portions of the second spacers, enlarging the distance between them, allowing for effective removal of the SAB layer and formation of a good metal silicide layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the distance between gates is shortened to increase device density, then productivity is improved, but the difficulty of removing the SAB layer increases and manufacturing precision deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidSAB layer removal quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The spacer structure is divided into two distinct segments: a first spacer adjacent to the gate and a second spacer further away from the gate. This segmentation allows different portions of the spacer to serve different functions - the first spacer maintains close spacing for high density, while the second spacer provides sufficient exposure for SAB layer removal, thus resolving the contradiction between device density and manufacturing precision.

Inventive Principle:
Principle #1Segmentation

2Productivity

If the distance between gates is shortened, then productivity is improved, but the SAB layer removal becomes more difficult and reliability worsens

Engineering Contradiction:
Improvedevice densityVSAvoidmetal silicide formation quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By segmenting the spacer into first and second spacers with different positions relative to the gate, the structure enables reliable SAB layer removal in the region between gates while maintaining short gate spacing for high device density. The second spacer specifically provides the necessary exposure for reliable metal silicide formation without compromising the density achieved through short gate spacing.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the distance between gates is shortened, then productivity is improved, but the ease of operation for SAB layer removal deteriorates

Engineering Contradiction:
Improvedevice densityVSAvoidSAB layer removal process
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The segmented spacer structure with first and second spacers creates distinct operational zones. The second spacer, being further from the gate, provides adequate space for etching tools and chemicals to effectively remove the SAB layer, making the operation easier despite the overall shortened gate spacing. This segmentation maintains high device density while preserving ease of SAB layer removal.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the successful removal of the SAB layer between spacers, facilitating the formation of a good metal silicide layer, even in closely spaced gate regions, thereby improving the metal silicide formation process.

Implementation Method 1

A reactive ion etching (RIE) process is performed to the second spacers with an etching gas to form the protective layer, and the part of the upper portions of the second spacers is removed simultaneously. The etching gas includes a chlorine gas (Cl2), an oxygen gas (O2), and an inert gas.

Methodology Applied
Scientific EffectReactive ion etching:

Implementation Method 2

The step of removing the protective layer comprises, for example, plasma ashing.

Methodology Applied
Scientific EffectPlasma ashing: Plasma

Data Source

PatentUS12261212B2Manufacturing method of semiconductor structure
Publication Date: 2025.03.25 UNITED MICROELECTRONICS CORP
  • US12261212B2 patent drawing
  • US12261212B2 patent drawing
  • US12261212B2 patent drawing

AI summary

A manufacturing method of the semiconductor structure including the following is provided. Gate structures are formed on a substrate. Each gate structure includes a gate, a first spacer, and a second spacer. The gate is disposed on the substrate. The first spacer is disposed on a sidewall of the gate. The second spacer is disposed on the first spacer. In a region between two adjacent gate structures, the first spacers are separated from each other, and the second spacers are separated from each other. A protective layer is formed between the two adjacent gate structures. The protective layer covers lower portions of the second spacers and exposes upper portions of the second spacers. A part of the upper portions of the second spacers is removed using the protective layer as a mask to enlarge a distance between the upper portions of the second spacers. The protective layer is removed.