Gate Spacer SiC-Rich Implantation for Etch Loss Reduction
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Solution Overview
Problem
During the fabrication of semiconductor devices, the processing of interlayer dielectric layers can inadvertently damage gate spacers, leading to structural and performance issues due to their close proximity and the reduced feature sizes in modern ICs, which existing methods have not adequately addressed.
Innovation Solution
A method involving a two-step implantation process for the gate spacer material, where silicon and carbon atoms are implanted in a specific order to form a SiC-rich layer, enhancing the etching selectivity and resistance of the gate spacer relative to the interlayer dielectric layer, thereby reducing the risk of damage during subsequent etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the interlayer dielectric layer is processed using conventional etching methods, then the dielectric layer can be removed, but the gate spacer is inadvertently damaged due to close proximity and reduced feature sizes
Solution Approach 1:
The gate spacer is modified with a gradient composition profile, where the carbon concentration varies through the thickness of the spacer. This creates local compositional differences that enhance etching selectivity - the carbon-rich regions provide resistance to etching while allowing controlled removal of the dielectric layer, thus protecting the gate spacer from damage during high-efficiency etching processes
Solution Approach 2:
The method changes the chemical composition parameters of the gate spacer by incorporating carbon atoms through implantation. This parameter change (adding carbon) fundamentally alters the etching characteristics of the spacer material, making it resistant to conventional dielectric etchants while maintaining compatibility with high-productivity etching methods for the interlayer dielectric
2Manufacturing precision
If the gate spacer composition is modified to improve etching resistance, then selectivity increases, but the manufacturing process complexity increases due to additional implantation steps
Solution Approach 1:
The carbon implantation is performed as a preliminary action before the dielectric layer deposition and subsequent etching processes. By pre-modifying the gate spacer composition, the method establishes etching selectivity in advance, allowing standard dielectric etching processes to proceed without requiring complex selective etching sequences or additional protective measures during later manufacturing steps
Solution Approach 2:
The method combines the gate spacer formation process with a carbon implantation step to simultaneously achieve structural definition and etching resistance modification. This merging of functions reduces the need for separate process steps that would otherwise be required to provide etching protection, thereby managing process complexity while achieving high manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly improves the etching selectivity and resistance of the gate spacer, minimizing its loss during interlayer dielectric layer processing, which helps maintain the structural integrity and performance of the semiconductor device.
Implementation Method 1
performing a first implantation process to the gate spacer, wherein the first implantation process includes bombarding an upper portion of the gate spacer with silicon atoms
Implementation Method 2
performing a second implantation process to the upper portion of the gate spacer, wherein the second implantation process includes bombarding the upper portion of the gate spacer with carbon atoms
Data Source
AI summary
A method includes forming a dummy gate structure over a semiconductor substrate, forming a gate spacer over a sidewall of the dummy gate structure, performing a first implantation process to an upper portion of the gate spacer using a first dosage source, and performing a second implantation process to the upper portion of the gate spacer using a second dosage source including carbon. The second dosage source is different from the first dosage source.