Gate Electrode Stack With Barrier Layer for Threshold Voltage Tuning

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Solution Overview

Problem

As semiconductor devices continue to reduce minimum feature sizes for increased integration density, challenges arise in accurately tuning threshold voltages and maintaining device performance, particularly in nano-FETs and FinFETs, due to the modification of work function tuning layers during treatment processes.

Innovation Solution

The formation of gate electrodes with multiple work function tuning layers, separated by a barrier layer that inhibits modification of underlying layers, allows for more precise tuning of threshold voltages and improved device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If work function tuning layers are used to tune threshold voltages, then threshold voltage tuning capability is improved, but the layers are modified during treatment processes which degrades tuning precision

Engineering Contradiction:
Improvethreshold voltage tuning precisionVSAvoidwork function tuning layer composition stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

A barrier layer is introduced as an intermediary between the first and second work function tuning layers. This barrier layer prevents unwanted modification of the first work function tuning layer during treatment processes while allowing the second work function tuning layer to be treated to achieve desired work function values, thereby maintaining composition stability while preserving tuning capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate electrode structure is segmented into multiple work function tuning layers separated by a barrier layer. This segmentation allows independent treatment of each layer - the first layer remains protected with stable composition, while the second layer can be modified to achieve precise work function tuning, resolving the contradiction between stability and tuning precision

Inventive Principle:
Principle #1Segmentation

2Productivity

If minimum feature sizes are reduced to increase integration density, then integration density is improved, but additional problems arise that degrade device performance

Engineering Contradiction:
Improveintegration densityVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different regions of the gate electrode structure are assigned different materials and properties. The first work function tuning layer uses a material (e.g., aluminum) optimized for one aspect of performance, while the second work function tuning layer uses a different material (e.g., titanium nitride) optimized for another aspect. This local differentiation allows the device to achieve both high integration density and maintained performance at reduced feature sizes

Inventive Principle:
Principle #3Local quality

3Measurement precision

If multiple work function tuning layers are formed with a barrier layer between them, then threshold voltage tuning accuracy is improved, but device structure complexity increases

Engineering Contradiction:
Improvethreshold voltage tuning accuracyVSAvoidgate electrode structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The barrier layer serves multiple functions simultaneously: it prevents unwanted modification of the first work function tuning layer, provides a interface for treating the second work function tuning layer, and maintains structural integrity. This multi-functionality allows accurate threshold voltage tuning without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250359318A1Semiconductor device and method
Publication Date: 2025.11.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250359318A1 patent drawing
  • US20250359318A1 patent drawing
  • US20250359318A1 patent drawing

AI summary

In an embodiment, a device includes: a channel region; a gate dielectric layer on the channel region; a first work function tuning layer on the gate dielectric layer, the first work function tuning layer including a n-type work function metal; a barrier layer on the first work function tuning layer; a second work function tuning layer on the barrier layer, the second work function tuning layer including a p-type work function metal, the p-type work function metal different from the n-type work function metal; and a fill layer on the second work function tuning layer.