High-Aspect-Ratio Gate Stack Formation to Prevent Collapse
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down gate structures with high aspect ratios, as they are prone to collapse during fabrication and can result in residue issues that lead to non-uniformity and device performance degradation, particularly in advanced process nodes where channel lengths and critical dimensions decrease.
Innovation Solution
A method for forming gate stacks with a high aspect ratio that includes creating a notch in the footprint profile of the gate structure, which reduces the risk of collapse and metal gate protrusion, and involves a series of steps including forming mandrel patterns, sacrificial layers, and replacing dummy gates with high-k metal gate stacks, ensuring mechanical strength and uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length and gate critical dimension are scaled down to continue IC miniaturization, then production efficiency increases and costs decrease, but the gate aspect ratio increases leading to gate collapse and residue accumulation
Solution Approach 1:
The gate structure is segmented into multiple functional layers including a dummy gate, spacers, and a metal gate. The dummy gate serves as a placeholder that is later replaced, while spacers provide structural support during processing. This segmentation allows the gate to maintain mechanical integrity during scaling while enabling the necessary high aspect ratio for continued miniaturization.
Solution Approach 2:
A dummy gate is formed in advance before the actual metal gate is created. This preliminary structure allows subsequent processing steps to be performed without risking damage to the final gate, as the dummy gate can be removed and replaced. The dummy gate maintains the geometric footprint needed for high aspect ratio scaling while protecting the overall device structure during manufacturing.
2Manufacturing precision
If the gate aspect ratio is increased to maintain gate length scaling, then device density improves, but residue accumulates at intersecting junctions causing non-uniformity and potential shorting
Solution Approach 1:
The dummy gate is selectively removed after serving its protective function. By extracting the dummy gate structure, the patent eliminates the source of residue accumulation at intersecting junctions. The removal process is designed to leave minimal residue, and any remaining residue is managed through the spacer structure that prevents it from causing shorting or non-uniformity in the final metal gate.
Solution Approach 2:
Spacers are introduced as intermediary structures between the dummy gate and the final metal gate. These spacers serve multiple functions: they maintain structural integrity during processing, define precise gate dimensions, and prevent residue from the dummy gate removal from causing harmful effects. The spacers act as a buffer that mediates between the dummy gate structure and the final gate formation.
Data Source
AI summary
A method includes forming a fin over a substrate, forming an isolation structure on the substrate, and forming first and second mandrel patterns over the fin. The fin extends upwardly through the isolation structure. The fin extends lengthwise along a first direction, and each of the first and second mandrel patterns extends lengthwise along a second direction perpendicular to the first direction. The method also includes depositing a sacrificial feature between the first and second mandrel patterns, removing the first and second mandrel patterns, forming a spacer layer in physical contact with sidewalls of the sacrificial feature, removing the sacrificial feature to form a trench, and forming a metal gate stack in the trench. The sacrificial feature extends lengthwise along the second direction.