Gate Stack Dipole Formation Without Anneal for Low EOT
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Solution Overview
Problem
Current methods for manufacturing transistors face challenges in achieving reduced thickness, lower thermal budget, and precise control of threshold voltage (Vt) without incurring equivalent oxide thickness (EOT) penalties, especially as device sizes shrink and materials' properties change, particularly in FinFET and GAA devices.
Innovation Solution
A method involving treating a metal gate stack with a metal-containing precursor to form a treated interfacial layer, followed by depositing a high-κ dielectric layer, which allows for controlled surface adsorption equilibrium and dipole species distribution, achieving desired dipole effects without the need for annealing processes, thereby reducing EOT and thermal budget.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional spike anneal is used to achieve dipole effect, then desired dipole effect is achieved, but EOT penalty and high thermal budget occur due to oxygen diffusion oxidizing underlying silicon
Solution Approach 1:
The patent applies preliminary action by depositing the dipole layer (metal-containing layer) before the high-κ dielectric layer, rather than using post-deposition spike anneal. This preliminary placement of dipole species eliminates the need for subsequent high-temperature annealing that causes oxygen diffusion and EOT penalty, while still achieving the desired dipole effect in the final structure.
Solution Approach 2:
The patent extracts the harmful spike anneal step from the conventional dipole engineering process. By removing the high-temperature annealing step that causes oxygen diffusion and EOT penalty, the invention achieves dipole effect through alternative means (controlled deposition and in-situ formation) without the harmful thermal budget and oxidation effects.
2Manufacturing precision
If ALD process is used to deposit dipole layer at thickness less than 3 Å, then continuous film growth is achieved, but undesired excess Vt tuning, EOT penalty and device leakage occur
Solution Approach 1:
The patent applies parameter changes by modifying the deposition parameters and material composition to achieve optimal dipole layer thickness and composition. By controlling the metal-containing precursor deposition parameters and composition, the invention achieves the desired dipole effect with minimal thickness (avoiding excess Vt tuning) while maintaining film continuity (preventing device leakage through discontinuous growth).
Solution Approach 2:
The patent uses composite materials by creating a dipole layer with specific metal-containing compounds (such as aluminum oxide, hafnium oxide, or other metal oxides/nitrides) that provide both dipole effect and film continuity at ultrathin dimensions. The composite nature of these materials allows simultaneous achievement of electrical performance (minimal Vt tuning) and structural integrity (continuous film preventing leakage).
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the achievement of desired dipole effects at thicknesses less than 3 Å, improving device performance and reliability by controlling the fraction of substrate surface atomic sites occupied by dipole species, thus addressing the limitations of conventional atomic layer deposition processes.
Implementation Method 1
controlled surface adsorption equilibrium and dipole species distribution
Data Source
AI summary
Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices which meet reduced thickness, lower thermal budget, and Vt requirements, and have improved device performance and reliability. Advantageously, the embodiments of the present disclosure provide methods of manufacturing electronic devices that achieve desired dipole effect without an annealing process. To achieve desired dipole effect that is “thinner” than 3 Å, embodiments of the disclosure advantageously include methods of controlling surface adsorption equilibrium and, in turn, controlling the fraction of substrate surface atomic sites that are occupied by dipole species, which is not considered to be achievable by ALD processes.