Replacement Gate Stack Tuning for Multi-Vt Void-Free FinFETs
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Solution Overview
Problem
As semiconductor devices approach smaller technology nodes, such as 5 nm and 3 nm, the integration of multiple transistors with distinct threshold voltages becomes challenging due to the limitations in manufacturing process windows and the risk of void formation during gate stack deposition, which affects the integration density and reliability of electronic components.
Innovation Solution
The method involves forming multiple gate stacks with different threshold voltages by selectively depositing and removing metal work function layers and fill materials over semiconductor fins, using a combination of interfacial layers, dielectric materials, and metal layers to achieve precise tuning of threshold voltages without increasing the overall thickness, thereby maintaining a narrow critical dimension and reducing the risk of voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple gate stacks with different threshold voltages are integrated, then device functionality and performance are improved, but manufacturing process complexity and difficulty increase
Solution Approach 1:
The gate stack structure is segmented into distinct functional layers: a first metal layer for threshold voltage tuning, a second metal layer for gate electrode functionality, and an insulating layer separating them. This segmentation allows independent processing and tuning of threshold voltage without affecting other gate functions, thereby improving device versatility while managing manufacturing complexity through modular layer-by-layer fabrication
Solution Approach 2:
Different regions of the gate stack are assigned different material compositions and properties. The first metal layer uses materials with specific work functions tailored to achieve desired threshold voltages in different device regions, while the second metal layer maintains consistent gate electrode properties. This local differentiation enables multiple threshold voltage characteristics across the device while maintaining a standardized manufacturing process
2Manufacturing precision
If the manufacturing process window is narrowed to achieve precise threshold voltage tuning, then threshold voltage precision is improved, but the risk of void formation increases
Solution Approach 1:
An insulating layer is introduced as an intermediary between the first metal layer (used for threshold voltage tuning) and the second metal layer (gate electrode). This intermediary layer decouples the deposition processes, allowing the first metal layer to be deposited with precise thickness control for threshold voltage tuning without directly affecting the subsequent gate electrode formation. The insulating layer acts as a buffer that prevents void formation by providing a stable interface and allowing independent optimization of each layer's deposition parameters
Solution Approach 2:
The first metal layer for threshold voltage tuning is deposited and processed before the second metal layer (gate electrode) is formed. This preliminary action allows precise threshold voltage tuning to be completed and stabilized before the gate electrode deposition begins, reducing the risk of void formation during subsequent processing steps by establishing a stable foundation layer first
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the successful integration of multiple transistors with separately tuned threshold voltages within a narrower manufacturing process window, reducing the risk of void formation and enhancing the stability and efficiency of semiconductor devices at advanced technology nodes.
Implementation Method 1
depositing and removing metal work function layers and fill materials over semiconductor fins
Implementation Method 2
using a combination of interfacial layers, dielectric materials, and metal layers to achieve precise tuning of threshold voltages
Data Source
AI summary
Semiconductor devices and methods of manufacturing semiconductor devices with differing threshold voltages are provided. In embodiments the threshold voltages of individual semiconductor devices are tuned through the removal and placement of differing materials within each of the individual gate stacks within a replacement gate process, whereby the removal and placement helps keep the overall process window for a fill material large enough to allow for a complete fill.