Gate Stack Composition Tuning for Threshold Voltage Control

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing low-cost, high-performance, and low-power integrated circuits due to increased complexity from scaling down semiconductor IC dimensions, which affects the control of threshold voltage in transistors.

Innovation Solution

The method involves forming a gate stack in semiconductor devices using a silicon-containing or aluminum-containing gas treatment to diffuse silicon or aluminum atoms into cap layers or work-function layers, preventing oxidation and reducing threshold voltage, thereby improving control and efficiency in transistor fabrication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scaling down semiconductor IC dimensions is performed to improve production efficiency and lower costs, then productivity and manufacturing cost are improved, but device complexity increases and control of threshold voltage becomes more difficult

Engineering Contradiction:
Improveproduction efficiencyVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the chemical composition and concentration of gases used during semiconductor fabrication processes. By adjusting gas flow rates, pressure, temperature, and composition ratios, the process controls threshold voltage and prevents oxidation without requiring additional process steps or complex equipment modifications, thus resolving the contradiction between improved productivity and increased device complexity.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If scaling down semiconductor IC dimensions is performed to improve production efficiency and lower costs, then productivity and manufacturing cost are improved, but manufacturing precision deteriorates due to difficulty in controlling threshold voltage

Engineering Contradiction:
Improveproduction efficiencyVSAvoidthreshold voltage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent utilizes parameter changes by precisely controlling gas composition, flow rates, temperature, and pressure during fabrication to achieve accurate threshold voltage control. This allows maintaining manufacturing precision despite scaling down dimensions, while still improving productivity through optimized process parameters.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces mechanical or physical control methods with chemical processes using silicon-containing or aluminum-containing gases. This substitution enables more precise control of threshold voltage through chemical reactions and deposition mechanisms, improving manufacturing precision without compromising productivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If conventional fabrication methods are used to maintain simplicity, then device complexity remains low, but oxidation issues occur and threshold voltage control deteriorates

Engineering Contradiction:
Improveprocess simplicityVSAvoidoxidation prevention
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces silicon-containing gases or aluminum-containing gases as intermediary substances during fabrication. These gases act as protective mediators that prevent oxidation of semiconductor structures while enabling threshold voltage control, all within existing process frameworks without adding significant complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates an inert or controlled atmospheric environment using specific gas compositions during fabrication processes. This inert atmosphere prevents oxidation of sensitive semiconductor structures while maintaining process simplicity and enabling reliable threshold voltage control.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

4Ease of manufacture

If conventional fabrication methods are used to maintain process simplicity, then ease of manufacture remains high, but threshold voltage control and device performance deteriorate

Engineering Contradiction:
Improveprocess simplicityVSAvoidthreshold voltage control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent achieves improved threshold voltage control by modifying process parameters such as gas composition, temperature, and pressure within conventional fabrication frameworks. This approach maintains ease of manufacture by using existing equipment and processes, while achieving superior precision through optimized parameter combinations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the control of threshold voltage in transistors, mitigates oxidation issues, and maintains the integrity of gate stacks, leading to improved performance and reliability in semiconductor devices.

Implementation Method 1

diffuse silicon or aluminum atoms into cap layers or work-function layers

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

preventing oxidation

Methodology Applied
Scientific EffectOxidation prevention: Oxidation

Implementation Method 3

reducing threshold voltage

Methodology Applied
Scientific EffectThreshold voltage reduction:

Data Source

PatentUS20240395882A1Semiconductor device and fabrication method thereof
Publication Date: 2024.11.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240395882A1 patent drawing
  • US20240395882A1 patent drawing
  • US20240395882A1 patent drawing

AI summary

A method includes following steps. A semiconductor fin is formed extending from a substrate. A gate dielectric layer is formed to wrap around semiconductor fin. A P-type work function layer is formed to wrap around the gate dielectric layer. An N-type work function layer is formed to wrap around the P-type work function layer. The N-type work function layer has a work function different from a work function of the P-type work function layer. The N-type work function layer is treated such that an upper portion of the N-type work function layer has a different composition than a lower portion of the N-type work function layer.