Gate Structure Fabrication via Directional Etching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The dipole exposure technique limits the flexibility in designing semiconductor elements by efficiently controlling gate structure dimensions in one direction while attenuating exposure in the perpendicular direction, making it difficult to achieve the required width for gate structures, especially as MOS element sizes decrease.

Innovation Solution

A fabricating method involving a substrate with initial gate structures formed, followed by an etching mask application and etching process to reduce the width of these structures, using a conventional exposure method to avoid light attenuation issues, allowing for gate structures to be formed in two different directions with improved flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dipole exposure technique is used to control gate structure width in one direction, then exposure resolution in that direction is improved, but exposure effect in perpendicular direction attenuates

Engineering Contradiction:
Improvegate structure width controlVSAvoidexposure effect
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent divides the gate structure fabrication into two separate processes: first forming gate structures in a first direction using dipole exposure, then forming gate structures in a second direction using conventional exposure. This segmentation allows each process to be optimized for its specific directional requirements, resolving the contradiction between directional precision and overall exposure reliability.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If dipole exposure technique is used to reduce critical dimension of gate structures, then CD control in one direction is improved, but width in perpendicular direction cannot reach required dimension

Engineering Contradiction:
Improvecritical dimension controlVSAvoidlayout flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies asymmetric treatment to different directional requirements: dipole exposure is used specifically for directions requiring high CD control, while conventional exposure is used for other directions. This asymmetric approach allows the fabrication process to adapt to varying layout requirements in different directions, maintaining both precision and flexibility.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent introduces dynamic adaptability by allowing different exposure techniques to be selected based on the specific directional requirements of each gate structure. This dynamic approach enables the fabrication process to adjust its methodology according to the layout design needs, achieving both precise CD control and layout flexibility.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If conventional exposure method is used, then exposure effect is uniform in all directions, but cannot achieve the required resolution for smaller MOS element sizes

Engineering Contradiction:
Improveexposure uniformityVSAvoidexposure resolution
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by matching the exposure method to the specific directional requirements of each gate structure. Dipole exposure with enhanced resolution is applied locally to directions requiring precise CD control, while conventional exposure is used for directions where uniformity is sufficient. This local optimization resolves the contradiction between overall uniformity and directional precision.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the flexibility in designing semiconductor elements by enabling the formation of gate structures with smaller critical dimensions in both directions, overcoming the limitations of the dipole exposure technique and allowing for more precise control over channel lengths and widths.

Implementation Method 1

an etching mask is formed to cover the first layout structure, and the etching mask exposes a portion of the first layout structure

Methodology Applied
Scientific EffectOptical absorption: Absorption (EM radiation)

Implementation Method 2

the first layout structure is etched with the etching mask to form a second layout structure having a second width

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS8575034B2Fabricating method of semiconductor element
Publication Date: 2013.11.05 UNITED MICROELECTRONICS CORP
  • US8575034B2 patent drawing
  • US8575034B2 patent drawing
  • US8575034B2 patent drawing

AI summary

The present invention relates to a fabricating method of a semiconductor element. First, a substrate is provided and a first layout structure having a first width is formed on the substrate. Then, an etching mask is formed to cover the first layout structure, and the etching mask exposes a portion of the first layout structure. After that, the first layout structure is etched with the etching mask to form a second layout structure having a second width. The second width is less than the first width. This fabricating method is capable of finishing the fabrication of gate structures in two different directions. Accordingly, the layout flexibility is improved.