Gate-Through Ion Implantation for Semiconductor Dopant Control
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Solution Overview
Problem
The increased integration of semiconductor devices leads to short-channel effects, causing leakage current issues and hot carrier effects due to dopant concentration changes during thermal processes, which are exacerbated by the complexity of existing manufacturing processes.
Innovation Solution
A method of manufacturing semiconductor devices via gate-through ion implantation, where a gate stack is formed and ion implantation for threshold voltage control and source/drain region formation is performed on the entire semiconductor substrate surface, with options for tilt angles, energies, and doses, reducing the impact of thermal processes and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple masks and process steps are used for halo ion implantation to control dopant concentration, then short-channel effects are alleviated, but manufacturing process complexity increases
Solution Approach 1:
The gate stack is formed before ion implantation, allowing the gate structure itself to serve as a mask and protection layer. This preliminary formation of the gate stack eliminates the need for separate halo implantation masks and steps, as the gate structure naturally defines the implantation regions and protects the channel during subsequent processing
Solution Approach 2:
The gate stack serves multiple functions: it acts as the transistor gate, as a mask for ion implantation, and as a protection layer for the channel region. This multi-functionality consolidates what would otherwise require separate components and steps, simplifying the overall manufacturing process while maintaining effective dopant concentration control
2Reliability
If dopant concentration is increased to solve short-channel effects, then device performance improves, but hot carrier effects are augmented
Solution Approach 1:
The ion implantation process applies dopants with high precision to specific regions: the channel region receives controlled doping for threshold voltage adjustment, while source/drain regions receive separate junction doping. This localized control ensures optimal dopant concentration in each region without excessive channel doping that would cause hot carrier effects
Solution Approach 2:
The method employs precise control of ion implantation parameters including dose (1×10^12 to 1×10^14 ions/cm² for threshold control), energy (50-200 keV), and tilt angle (0-15 degrees). These parameter optimizations enable achieving the required dopant concentration for short-channel effect mitigation while avoiding the excessive concentrations that trigger hot carrier effects
3Manufacturing precision
If conventional ion implantation with multiple masks is used, then dopant concentration can be controlled, but the number of process steps increases
Solution Approach 1:
The gate stack is formed in advance before any ion implantation steps, establishing a permanent mask structure that eliminates the need for temporary masks. This preliminary action consolidates multiple masking operations into a single structural formation, maintaining dopant concentration precision while reducing process steps
Solution Approach 2:
The method combines threshold voltage control implantation and junction implantation into a unified process sequence using the gate stack as a common reference and mask. By merging what would otherwise be separate masked operations into a coordinated process, the method maintains precise dopant placement while improving manufacturing efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes dopant concentrations, reduces manufacturing complexity, and enhances device performance by minimizing short-channel effects and hot carrier issues, while maintaining process efficiency.
Implementation Method 1
performing ion implantation for control of threshold voltage and junction ion implantation for formation of source/drain regions
Data Source
AI summary
Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation for control of the threshold voltage and junction ion implantation for formation of source/drain regions, on the entire surface of the semiconductor substrate having the gate stack formed thereon. In accordance with the present invention, since ion implantation is carried out after formation of the gate stack involving a thermal process, there are no changes in concentrations of implanted dopants due to heat treatment upon formation of the gate stack.