Gate Tracking Lines for LCD Edge Area Loading Effect

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Solution Overview

Problem

Conventional liquid crystal display panels face challenges in achieving uniform image quality due to the loading effect caused by the close proximity of conducting lines, leading to non-uniform signal transmission and unequal pixel function, especially in portable devices where edge areas need to be minimized.

Innovation Solution

The active array substrate incorporates gate tracking lines with auxiliary insulating and semiconductor layers, reducing the loading effect by electrically connecting each gate tracking line to corresponding scan lines through via holes, and forming pixel electrodes connected to active devices, which allows for thinner edge designs and improved signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of auxiliary gate lines is increased to match the number of scan lines, then the gate signal transmission is improved, but the edge area width must be increased which enlarges the display device size

Engineering Contradiction:
Improvegate signal transmissionVSAvoidedge area width
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent introduces gate tracking lines that extend from the edge area into the image display area, changing the spatial dimension of signal transmission. This allows the gate signal to be transmitted through an additional dimensional path (via the tracking lines) without requiring wider edge areas, thus resolving the contradiction between reliable signal transmission and compact device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate tracking lines act as intermediary elements that connect the scan lines in the edge area to the data lines in the image display area. These tracking lines serve as mediators that transmit gate signals without requiring direct connection through wide edge areas, thereby enabling compact design while maintaining signal transmission reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the distance among conducting lines is reduced to increase pixel density, then the display resolution is improved, but the loading effect increases causing non-uniform signal transmission

Engineering Contradiction:
Improvepixel densityVSAvoidsignal transmission uniformity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent segments the gate signal transmission path into multiple independent components: scan lines in the edge area, gate tracking lines extending into the display area, and connection points to data lines. This segmentation allows each component to be optimized independently, reducing the loading effect on any single line while maintaining high pixel density through close line spacing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate tracking lines provide localized signal transmission paths with different electrical characteristics in different regions. By creating dedicated tracking lines with specific electrical properties in the image display area, the patent ensures uniform signal transmission locally even when conducting lines are closely spaced to achieve high pixel density.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8189130B2Array substrate, liquid crystal display panel and method for manufacturing the same
Publication Date: 2012.05.29 AU OPTRONICS CORP
  • US8189130B2 patent drawing
  • US8189130B2 patent drawing
  • US8189130B2 patent drawing

AI summary

An active array substrate, a liquid crystal display panel and a method for manufacturing the active array substrate are provided. The active array substrate includes a base, scan lines, data lines and gate tracking lines disposed on the base. Each of the gate tracking lines has first portions, auxiliary portions and junction portions, wherein the junction portion and the first portion are formed in different layers. One of the junction portions is electrically connected with corresponding one of the first portions.