Gate Trench SiC Power Semiconductors With Buried Edge Termination

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Solution Overview

Problem

Conventional power semiconductor devices face challenges in maintaining consistent doping concentrations and reducing leakage currents due to complex manufacturing processes, especially when using wide band-gap semiconductor materials like silicon carbide, which can lead to device failure and increased on-resistance.

Innovation Solution

The implementation of gate trench power semiconductor devices with deep trench shielding regions and buried termination structures formed by ion implantation, allowing for more accurate doping levels and reduced ion implantation damage, along with an epitaxially grown lightly-doped semiconductor layer that lowers surface fields and omits the mesa etch process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional manufacturing processes are used for power semiconductor devices, then device fabrication can proceed with standard methods, but doping concentration consistency deteriorates and leakage currents increase

Engineering Contradiction:
Improvedoping concentration consistencyVSAvoidleakage current
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The device is divided into distinct regions including gate trenches that segment the semiconductor structure. This segmentation allows for localized doping control and reduces the propagation of doping concentration variations across the entire device, thereby improving doping consistency and reducing leakage currents at region boundaries.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Ion implantation is performed as a preliminary doping step before final device fabrication. This preliminary action establishes controlled doping profiles with precise concentration levels, ensuring consistent doping throughout the device structure and preventing subsequent leakage current issues.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If complex manufacturing processes are used to reduce leakage currents, then leakage current can be reduced, but manufacturing complexity and ion implantation damage increase

Engineering Contradiction:
Improveleakage currentVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The mesa etch process is completely removed from the manufacturing sequence. Instead of using complex multi-step etching to create device structures, the invention uses ion implantation through existing trenches and surfaces, simplifying the process while maintaining effective leakage current control through precise doping.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the doping approach by using ion implantation with specific energy and concentration parameters rather than conventional diffusion or complex etching-based methods. This parameter-controlled approach reduces process complexity while achieving superior leakage current control through precise doping profiles.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If ion implantation is used for doping, then doping accuracy can be improved, but ion implantation damage to the semiconductor lattice increases

Engineering Contradiction:
Improvedoping accuracyVSAvoidion implantation damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The gate trench structure serves as a cushioning element that absorbs and distributes ion implantation damage. By confining ion implantation to specific trench regions and using the trench walls as barriers, the damage is localized and prevented from propagating through the entire semiconductor lattice, maintaining doping accuracy while reducing overall damage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Ease of manufacture

If gate trenches are spaced far apart, then manufacturing is simpler, but device performance and blocking capability deteriorate

Engineering Contradiction:
Improvegate trench spacingVSAvoidblocking performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The invention changes the critical parameters of ion implantation including energy, dose, and angular distribution to enable effective doping at reduced gate trench spacings. This allows gate trenches to be placed closer together, improving blocking performance through better field distribution while maintaining manufacturing feasibility through optimized implantation parameters.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach maintains closer doping levels, reduces manufacturing complexity, and improves the accuracy and consistency of implantation, leading to enhanced device performance and reduced leakage currents, while allowing for more tightly spaced gate trenches and improved blocking performance.

Implementation Method 1

second conductivity type dopants may next be implanted into an upper surface of the drift region to form a termination structure in a termination region of the semiconductor device and to form a shielding pattern in an active region of the semiconductor device

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

an epitaxially grown lightly-doped semiconductor layer that lowers surface fields

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS11837629B2Power semiconductor devices having gate trenches and buried edge terminations and related methods
Publication Date: 2023.12.05 WOLFSPEED INC
  • US11837629B2 patent drawing
  • US11837629B2 patent drawing
  • US11837629B2 patent drawing

AI summary

Semiconductor devices include a semiconductor layer structure comprising a drift region that includes a wide band-gap semiconductor material. A shielding pattern is provided in an upper portion of the drift region in an active region of the device and a termination structure is provided in the upper portion of the drift region in a termination region of the device. A gate trench extends into an upper surface of the semiconductor layer structure. The semiconductor layer structure includes a semiconductor layer that extends above and at least partially covers the termination structure.