Gate Trench Deep Shielding to Prevent Drift Region Doping
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Solution Overview
Problem
Power semiconductor devices with gate trenches face issues such as increased leakage current and oxide reliability problems due to high electric fields at sharp corners, leading to potential device failure, and existing manufacturing processes are complex and inefficient in forming deep shielding patterns without affecting the n-type drift region.
Innovation Solution
A method of forming deep shielding patterns underneath gate trenches using new approaches that prevent unintended doping of the n-type drift region, involving techniques like isotropic etching and angled ion implantation to create overhang masks and shield the gate insulating layer from high electric fields, ensuring effective shielding without modifying the gate trench dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dopant implantation is used to form shielding patterns, then shielding effect is achieved, but p-type dopants unintentionally implant into the n-type drift region causing increased leakage current
Solution Approach 1:
An oxide mask layer is introduced as an intermediary barrier between the p-type dopant source and the n-type drift region. This mask layer prevents unwanted dopant implantation into the drift region while allowing the shielding pattern to be formed at the gate trench interface, thus resolving the contradiction between achieving shielding effect and preventing leakage current
Solution Approach 2:
The oxide mask layer is formed in advance before dopant implantation. This preliminary action creates a protective barrier that prevents the harmful side effect (dopant contamination) before it can occur, while still allowing the desired shielding pattern formation to proceed
2Reliability
If gate trench dimensions are increased to improve shielding, then shielding effect is enhanced, but device area increases and manufacturing complexity increases
Solution Approach 1:
Instead of uniformly increasing gate trench dimensions throughout the structure, the shielding is localized to specific regions where high electric fields occur. The p-type dopant shielding pattern is concentrated at the gate trench interface and extends vertically, providing targeted shielding without increasing overall device area or manufacturing complexity
3Manufacturing precision
If complex manufacturing processes are used to form shielding patterns, then shielding precision is improved, but manufacturing efficiency decreases
Solution Approach 1:
The formation of the oxide mask layer and the subsequent dopant implantation to create shielding patterns are combined into a single integrated process flow. The oxide mask is formed using standard deposition techniques, and dopant implantation follows immediately, eliminating the need for separate, complex processing steps while maintaining precise shielding pattern formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method enhances the reliability of gate insulating layers, reduces leakage current, and maintains device performance by preventing p-type dopant implantation into the n-type drift region, thus avoiding wider or deeper gate trenches and complex manufacturing processes.
Implementation Method 1
forming an oxide mask layer on an upper surface of the semiconductor layer structure; implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches
Implementation Method 2
implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches, wherein the dopants that are implanted into the bottom surfaces of the gate trenches form deep shielding patterns
Data Source
AI summary
devices and methods of forming a semiconductor device that includes a deep shielding pattern that may improve a reliability and/or a functioning of the device. An example method may include forming a wide band-gap semiconductor layer structure on a substrate, the semiconductor layer structure including a drift region that has a first conductivity type; forming a plurality of gate trenches in an upper portion of the semiconductor layer structure, the gate trenches spaced apart from each other, each gate trench having a bottom surface, a first sidewall, a second sidewall, and an upper opening; forming an obstruction over a portion of each gate trench that partially obscures the upper opening; and implanting dopants having a second conductivity type that is opposite the first conductivity type into the bottom surfaces of the gate trenches, where the dopants implanted into the bottom surface of the gate trenches form deep shielding patterns.