Gate Trench Formation Using Mandrel Structures for Field Effect Transistors
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Solution Overview
Problem
Photomask misalignment during the fabrication of field effect transistors can lead to gate material etching within trenches, resulting in circuitry failure or unacceptable device performance due to the close width of gate lines to trench dimensions.
Innovation Solution
A method involving the formation of masking material over a semiconductor substrate, where array and peripheral trenches are created, and gate material is deposited within these trenches, followed by selective etching to recess the gate material and form accurate gate outlines, avoiding photolithographic patterning of gate materials post-deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography and etch are used to pattern gate material after deposition, then gate lines can be formed to match trench dimensions, but photomask misalignment causes gate material etching within trenches leading to circuitry failure
Solution Approach 1:
The patent applies preliminary action by forming a mandrel structure within the trench before gate material deposition. This mandrel serves as a pre-established guide that defines the gate line boundaries, ensuring that subsequent gate material deposition and etching processes occur precisely within the intended boundaries without risking misalignment damage to the circuitry.
Solution Approach 2:
The patent introduces an intermediary mandrel structure that mediates between the trench structure and the gate material. This mandrel acts as a protective intermediary element that prevents direct contact between etching processes and critical gate regions, thereby protecting against misalignment-induced damage while still allowing precise gate line formation.
2Manufacturing precision
If gate material is deposited to overfill trenches, then complete trench coverage is achieved, but subsequent patterning becomes more complex and prone to misalignment
Solution Approach 1:
The mandrel structure is formed in advance within the trench, providing a pre-defined template for gate material deposition. This preliminary structure guides the deposition process to achieve complete trench coverage while maintaining precise dimensional control, thereby simplifying subsequent patterning steps rather than complicating them.
Solution Approach 2:
The mandrel structure serves a dual function: it acts as both a formation guide during deposition and as a self-aligned etching mask during patterning. This self-service capability eliminates the need for separate alignment procedures, reducing overall process complexity while ensuring complete trench coverage.
3Productivity
If gate line width is made very close to trench width, then device density is improved, but any misalignment results in gate material etching within trenches causing device failure
Solution Approach 1:
The mandrel is formed preliminarily within the trench at the optimal width for high device density. This pre-established structure provides a physical boundary that maintains the close relationship between gate line width and trench width while protecting against misalignment, thereby enabling high density without sacrificing reliability.
Solution Approach 2:
The mandrel structure provides a protective cushion between the etching process and the gate material boundaries. This beforehand cushioning element absorbs potential misalignment errors, preventing etching from reaching critical gate regions even when gate line width is minimized for high density applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures precise gate formation, reducing the risk of circuitry failure and improving device performance by maintaining the integrity of gate material within trenches, thus enhancing the reliability of field effect transistors.
Implementation Method 1
forming masking material over semiconductive material of a substrate
Implementation Method 2
Array gate material is deposited within the array circuitry trenches in the masking material and within the array circuitry trenches in the semiconductive material
Data Source
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AI summary
The invention includes methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry- comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates. In one implementation, a method of forming a field effect transistor includes forming masking material (22, 24, 26) over semiconductive material of a substrate (11). A trench (30) is formed through the masking material (22, 24, 26) and into the semiconductive material (11). Gate dielectric material (32) is formed within the trench (30) in the semiconductive material (11). Gate material (34) is deposited within the trench (30) in the masking material (22, 24, 26) and within the trench (30) in the semiconductive material (11) over the gate dielectric material (32). Source/drain regions are formed. Other aspects and implementations are contemplated.