Gate Turn On Voltage Compensating Circuit for Display Panel Signal Uniformity

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Solution Overview

Problem

In flat panel displays, the inconsistency in gate turn on voltage signals due to varying trace impedance in gate drive chips leads to horizontal two split screen phenomena, affecting display quality.

Innovation Solution

A gate turn on voltage compensating circuit comprising a voltage generation module, clock control module, and chamfering module, which generates and adjusts voltage signals of different depths to ensure uniformity across gate drive chips connected in cascade, alleviating signal inconsistencies and improving display quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple gate drive chips are arranged in cascade to implement progressive scanning, then the display panel can achieve real-time refreshing and dynamic display, but the trace impedance inconsistency in different gate drive chips causes gate turn on voltage signals to differ, resulting in horizontal two split screen phenomenon

Engineering Contradiction:
Improvereal-time refreshing capabilityVSAvoidgate turn on voltage uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by making different parts of the system (gate drive chips at different positions) have different chamfering depths. Specifically, gate drive chips closer to the voltage generation module receive voltage signals with smaller chamfering depths, while chips farther away receive signals with larger chamfering depths. This localized differentiation compensates for the cumulative impedance effects along the signal path, ensuring uniform gate turn on voltages across all chips while maintaining real-time refreshing capability

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of voltage signal chamfering depth to compensate for trace impedance variations. By dynamically adjusting the chamfering depth parameter based on the position of each gate drive chip in the cascade, the system compensates for signal degradation accumulated over longer trace lengths. This parameter modification ensures that all gate drive chips receive effectively uniform gate turn on voltages, eliminating the horizontal split screen phenomenon while preserving high-speed real-time display refreshing

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If the gate turn on voltage signal is transferred through multiple gate drive chips via long wiring, then progressive scanning can be implemented, but the trace impedance becomes inconsistent, causing signal differences between chips

Engineering Contradiction:
Improveprogressive scanning implementationVSAvoidsignal consistency
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-adjusting the chamfering depth of voltage signals before they reach each gate drive chip. The system anticipates the cumulative impedance effects that will occur during signal transmission through long wirings and compensates for them in advance. By setting appropriate chamfering depths based on each chip's position in the cascade before the signal actually travels through the wiring, the system ensures signal consistency is maintained throughout progressive scanning operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces the chamfering module as an intermediary between the voltage generation module and the gate drive chips. This intermediary component processes the voltage signals by applying position-dependent chamfering, thereby mediating the signal transmission through long wirings. The chamfering module acts as a buffer that compensates for trace impedance variations, ensuring that signal consistency is maintained across all gate drive chips even when connected through extended wiring for progressive scanning

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10121403B2Gate turn on voltage compensating circuit, display panel, driving method and display apparatus
Publication Date: 2018.11.06 BOE TECHNOLOGY GROUP CO LTD
  • US10121403B2 patent drawing
  • US10121403B2 patent drawing
  • US10121403B2 patent drawing

AI summary

The present disclosure provides a gate turn on voltage compensating circuit, a display panel, a driving method and a display apparatus thereof. The gate turn on voltage compensating circuit includes a voltage generation module, a clock control module and a chamfering module. The voltage generation module is used for correspondingly outputting generated first voltage signal and second voltage signal to a first voltage input terminal and a second voltage input terminal of the chamfering module; the clock control module is used for controlling the chamfering module to output corresponding chamfered voltage signals in the corresponding time periods, so that the chamfering depths of gate turn on voltage signals input correspondingly to respective gate drive chips in different time periods are different.