Gate Voltage Boosting Circuit for Spin-Torque MRAM Programming
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Solution Overview
Problem
The programming current in spin-torque MRAM cells is reduced due to voltage drop across the MTJ device, leading to asymmetrical programming current capability, necessitating a solution to boost the gate voltage of the select switching MOS transistor to maintain effective programming.
Innovation Solution
A gate voltage boosting circuit is implemented to enhance the word line voltage, using high voltage pass transistors and optional clamp diodes to prevent over-boosting, ensuring consistent programming current across spin-torque MRAM cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If programming current is applied through the MTJ device, then magnetization switching is achieved, but voltage drop across the MTJ reduces the programming current capability
Solution Approach 1:
The gate voltage boosting circuit is activated before the programming operation to pre-charge the word line to a higher voltage level. This preliminary action ensures that when programming current flows through the MTJ device, the gate voltage remains sufficiently high to maintain strong transistor conduction despite the voltage drop across the MTJ, thereby preventing programming current reduction
Solution Approach 2:
The invention dynamically changes the gate voltage parameter from a standard level to a boosted level during programming operations. By detecting when programming is required and applying an elevated gate voltage through the boosting circuit, the system compensates for the voltage drop across the MTJ device and maintains optimal programming current capability throughout the operation
2Device complexity
If standard word line voltage is used, then circuit simplicity is maintained, but asymmetrical programming current capability occurs
Solution Approach 1:
The gate voltage boosting circuit introduces dynamic control to the word line voltage, allowing it to adapt between standard and boosted levels based on operational requirements. The circuit includes control logic that activates the boosting function only when needed for programming operations, maintaining circuit simplicity during reads while ensuring symmetrical programming capability when writes are performed
Solution Approach 2:
The gate voltage boosting circuit acts as an intermediary between the standard word line driver and the select switching transistor gate. This intermediate stage conditions and enhances the gate voltage specifically when programming is required, providing the additional voltage headroom needed to maintain symmetrical programming current capability without modifying the fundamental word line driver architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The gate voltage boosting circuit effectively compensates for voltage rise at the source node, maintaining programming current levels and ensuring symmetric programming capabilities in both directions, thus preventing current reduction and ensuring reliable data writing.
Implementation Method 1
The memory cell is programmed by passing a spin-polarized current through the tunnel barrier that generates a spin-transfer torque that switches the magnetization
Implementation Method 2
The memory cell includes a magnetic tunnel junction (MTJ) having a tunnel barrier sandwiched between a barrier layer and a reference layer
Data Source
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AI summary
A gate voltage boosting circuit provides a voltage boost to a gate of a select switching MOS transistor of a spin-torque MRAM cell to prevent a programming current reduction through an MTJ device of the spin-torque MRAM cell. A spin-torque MRAM cell array is composed of spin-torque MRAM cells that include a MTJ element and a select switching device. A local word line is associated with one row of the plurality of spin-torque MRAM cells and is connected to a gate terminal of the select switching devices of the row of MRAM cells to control activation and deactivation. One gate voltage boosting circuit is placed between an associated global word line and an associated local word line. The gate voltage boosting circuits boost a voltage of a gate of the selected switching device during writing of a logical "1 " to the MTJ element of a selected spin-torque MRAM cell.