Zero-Volt Crossing Detection Using Gate Voltage Latching
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Solution Overview
Problem
Conventional zero-volt switching (ZVS) systems face challenges in achieving accurate timing accuracy due to comparator delays, which are typically above the nanosecond range required for high-frequency switching in wireless power transfer systems like A4WP, leading to inefficiencies in power conversion.
Innovation Solution
A control module comprising a comparator and control circuitry that includes a drain-to-source voltage comparator and a gate-to-source voltage comparator, with latching elements to adjust gate-driver signals based on zero-volt crossing detection, minimizing delay and optimizing switching times by using the gate voltage as a clock to latch comparison results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional comparators are used for zero-voltage crossing detection, then the system can detect voltage crossings, but the timing accuracy deteriorates due to comparator delays exceeding the nanosecond range required for high-frequency switching
Solution Approach 1:
The patent applies preliminary action by using the gate voltage signal to pre-trigger the latching of the comparator output. The gate voltage leading edge activates the AND gate before the comparator completes its comparison, ensuring the zero-crossing event is captured at the precise moment it occurs rather than after comparator delay. This preliminary triggering mechanism eliminates the timing error caused by conventional comparator delays.
2Productivity
If high-frequency switching is implemented in wireless power transfer systems, then power transfer efficiency is improved, but timing synchronization deteriorates due to the extremely narrow time windows available for zero-volt switching detection
Solution Approach 1:
The patent introduces an intermediary mechanism - the AND gate - that combines the comparator output with the gate voltage signal. This intermediary logic element acts as a mediator that captures the zero-crossing event only when both conditions are met: the voltage has crossed zero (comparator output) and the gate is in the appropriate state (gate voltage signal). This intermediary approach enables precise timing synchronization even at high switching frequencies by creating a narrow, well-defined detection window.
Data Source
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AI summary
In methods and apparatus for detecting zero-volt crossing in a field-effect transistor, a comparator (200) compares a drain-to source voltage (Vds) of the transistor to a threshold voltage (VTH-ds). A gate voltage signal (Vgs) of the transistor is provided to a clock input of the comparator (200), such that the gate voltage signal (Vgs) is used to latch a result of the comparison to an output of the comparator (200). A control function with respect to the transistor is performed based on the value of the comparator (200) output.