Gate Wiring Width Variation for Stress Relief in Dummy Pixels
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Solution Overview
Problem
In electro-optical devices, stress concentrations between the peripheral circuit region and the dummy pixel region can lead to cracks, potentially cutting the gate wiring and affecting device stability, especially when using materials with different thermal expansion coefficients.
Innovation Solution
The electro-optical device design includes a gate wiring configuration where the width of the first portion between the first and second transistors is larger than the width between the second and third transistors, with slit formations between the gate wiring and dummy pixel shielding films to reduce stress and maintain light blocking properties, and using metal silicide for the gate wiring to prevent light reflection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If a dummy pixel shielding film is provided in the dummy pixel region to block oblique light and return light, then display quality in the image display region is improved, but stress concentration occurs at the boundary between the dummy pixel region and peripheral circuit region, leading to crack generation
Solution Approach 1:
The dummy pixel shielding film is divided into multiple independent shielding portions corresponding to individual dummy pixels, with slits provided between adjacent shielding portions. This segmentation reduces stress concentration at the boundary between dummy pixel region and peripheral circuit region while maintaining light blocking functionality.
Solution Approach 2:
The shielding film structure is locally optimized by providing slits only in specific regions where stress concentration is expected, while maintaining continuous shielding in other areas. This allows differential stress management in different zones of the device.
2Strength
If slits are provided in the dummy pixel shielding film to reduce stress, then crack generation is prevented, but light blocking effectiveness is reduced
Solution Approach 1:
The width, length, and positioning of slits are precisely controlled to optimize the balance between stress relief and light blocking. By adjusting these parameters, the shielding film maintains sufficient light blocking effectiveness while providing adequate stress relief pathways.
3Adaptability or versatility
If arrangement densities of components are different between dummy region and peripheral circuit region, then functional requirements are met, but stress is concentrated at the boundary portion, increasing crack risk
Solution Approach 1:
The shielding film is segmented into multiple portions with slits between them, which helps distribute and reduce stress concentration at the boundary between regions with different arrangement densities, preventing cracks while maintaining functional layout requirements.
4Device complexity
If gate wiring is used in the dummy pixel shielding film to serve dual functions, then device complexity is reduced, but the wiring is vulnerable to being cut by cracks
Solution Approach 1:
The gate wiring width is locally increased in the dummy pixel region where stress concentration occurs. This localized reinforcement ensures wiring integrity and prevents cuts from cracks while maintaining standard wiring dimensions in other regions where full functionality is required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses gate wiring cuts and maintains high manufacturing yield by dispersing stress and ensuring stable operations against light interference, while also preventing thermal stress-induced cracks.
Implementation Method 1
width in the second direction of a first portion of the gate wiring between the first transistor and the second transistor is larger than width in the second direction of a second portion of the gate wiring between the second transistor and the third transistor... even if a stress is caused to concentrate in a boundary portion... it is possible to suppress the gate wiring from being cut due to the crack
Implementation Method 2
with slit formations between the gate wiring and dummy pixel shielding films to reduce stress and maintain light blocking properties
Implementation Method 3
using metal silicide for the gate wiring to prevent light reflection
Implementation Method 4
by providing the dummy pixel shielding film corresponding to opening regions of the dummy pixels, oblique light that enters the dummy region in an oblique direction, return light, or the like can be blocked
Data Source
AI summary
A liquid crystal device includes a first dummy pixel and a second dummy pixel adjacent to each other in an X direction, in which width of a first portion of a scanning line between a first transistor of the first dummy pixel and a second transistor of the second dummy pixel is larger than width of a second portion of the scanning line between the second transistor and a third transistor of a pixel.