Gated Diode Nonvolatile Memory Cell for Miniaturization
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Solution Overview
Problem
Conventional non-volatile memory cell structures face challenges in miniaturization and sensitivity in reading charge storage due to lateral separation of drain and source diffusions, limiting further scaling and sensitivity in charge storage.
Innovation Solution
A gated diode non-volatile memory device with a charge storage structure, dielectric structures, and a diode structure, where the diode nodes are separated by a junction and isolated by dielectric, allowing for precise measurement of read current through band-to-band tunneling, and adjustable bias arrangements for programming and erasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional transistor structures with laterally separated drain and source diffusions are used, then the memory cell can be manufactured with standard processes, but further miniaturization is resisted due to the lateral separation requirement
Solution Approach 1:
The patent transitions from lateral separation of drain and source to vertical stacking, where the charge storage structure is positioned above the diode structure. This dimensional change eliminates the lateral separation constraint and enables further miniaturization while maintaining manufacturability with standard processes.
Solution Approach 2:
The patent merges the drain and source functions into a single diode structure with first and second nodes, eliminating the need for separate drain and source diffusions. This consolidation reduces structural complexity and enables smaller memory cell dimensions.
2Measurement precision
If conventional memory cell structures are used, then the manufacturing process is simple, but the sensitivity in reading charge storage is insufficient
Solution Approach 1:
The patent introduces a diode structure with specific node configurations as an intermediary between the charge storage structure and the bit line. This intermediary enables precise measurement of read current through band-to-band tunneling, significantly improving charge storage reading sensitivity while maintaining manufacturing simplicity.
3Measurement precision
If the diode structure nodes are isolated by dielectric, then measurement precision of read current is improved, but device complexity increases
Solution Approach 1:
The patent applies dielectric isolation selectively and locally around the diode nodes rather than throughout the entire structure. This localized approach provides the necessary measurement precision through proper node isolation while minimizing the overall device complexity and maintaining compatibility with standard manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables further miniaturization and enhanced sensitivity in reading charge storage states, allowing for increased storage density and efficient programming/erasing operations without altering the charge storage state during read operations.
Implementation Method 1
measure a read current flowing through the diode structure in reverse bias to determine the charge storage state of the charge storage structure. The read current includes a band-to-band read current component.
Implementation Method 2
The bias arrangement applied by the logic circuitry causes multiple voltage differences in the gated diode nonvolatile memory device, such as a voltage difference between a source of gate voltage (typically a word line) and the second node of the diode structure, and another voltage difference between the first node and the second node of the diode structure. These voltage differences resulting from the bias arrangement cause sufficient band-to-band tunneling current for measuring the read current
Implementation Method 3
These memory cell structures store data by trapping charge in a charge trapping dielectric layer, such as silicon nitride.
Data Source
AI summary
A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Example embodiments include the individual memory cell, an array of such memory cells, methods of operating the memory cell or array of memory cells, and methods of manufacturing the same.