Gated MIS Tunnel Diode Structure for Higher PVCR Control
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Solution Overview
Problem
Conventional negative transconductance devices, such as tunnel diodes and TFETs, have a relatively low peak-to-valley current ratio (PVCR), limiting their usefulness in various applications due to their limited current ratio capabilities.
Innovation Solution
The development of a gated MIS-tunnel diode device with a specific structure and fabrication process, including a tunnel diode dielectric layer and a gate dielectric layer, where the thickness of the tunnel diode dielectric layer is optimized between 2 nm to 4 nm to increase the PVCR by modulating the Schottky barrier height and controlling minority carrier concentration, thereby enhancing the negative transconductance behavior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional tunnel diode structures are used, then the device structure is simple, but the peak-to-valley current ratio is low
Solution Approach 1:
The device is segmented into distinct functional layers: a gate dielectric layer and a tunnel diode dielectric layer with different thicknesses. The tunnel diode dielectric layer is divided into a first portion (thinner, 2-4 nm) and a second portion (thicker, 4-10 nm), allowing independent optimization of tunneling current and barrier control functions.
Solution Approach 2:
Different regions of the dielectric structure have different thicknesses to perform different functions. The thinner first portion of the tunnel diode dielectric layer enables high tunneling current, while the thicker second portion provides better barrier control, creating local quality variations that improve overall PVCR.
2Reliability
If the tunnel diode dielectric layer thickness is increased, then the Schottky barrier height control improves, but the tunneling current decreases
Solution Approach 1:
The tunnel diode dielectric layer is segmented into two portions with different thicknesses. The first portion (2-4 nm) maintains high tunneling current, while the second portion (4-10 nm) provides improved Schottky barrier control, resolving the trade-off between current and control quality.
Solution Approach 2:
The dielectric layer thickness parameter is changed across different portions of the layer, with the first portion having thickness 2-4 nm for high current and the second portion having thickness 4-10 nm for better barrier control, optimizing both competing requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The gated MIS-tunnel diode device achieves a significant increase in peak-to-valley current ratio, from 1 order of magnitude to 6 orders of magnitude, by controlling the tunnel diode dielectric layer thickness, thereby improving the device's performance and utility in applications requiring higher current ratios.
Implementation Method 1
a tunnel diode dielectric layer disposed on the surface of the substrate adjacent to the gate dielectric layer. A tunnel diode electrode is disposed on the tunnel diode dielectric layer... the thickness of the tunnel diode dielectric layer is optimized between 2 nm to 4 nm to increase the PVCR by modulating the Schottky barrier height
Data Source
AI summary
Gated MIS tunnel diode devices having a controllable negative transconductance behavior are provided. In some embodiments, a device includes a substrate, a tunnel diode dielectric layer on a surface of the substrate, and a gate dielectric layer on the surface of the substrate and adjacent to the tunnel diode dielectric layer. A tunnel diode electrode is disposed on the tunnel diode dielectric layer, and a gate electrode is disposed on the gate dielectric layer. A substrate electrode is disposed on the surface of the substrate, and the tunnel diode electrode is positioned between the gate electrode and the substrate electrode.