Gated Unit for Recurrent Neural Networks Using Element Processor

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Solution Overview

Problem

The training or inference of gated recurrent neural networks, such as long short-term memory (LSTM) networks, involves resource-intensive element-wise operations on high-dimensional vectors, which can be costly in terms of hardware area and power requirements, and challenging in resource-constrained applications due to large vector storage distances.

Innovation Solution

A method that maps parameters of the gated recurrent neural network to an array of computational units, allowing for efficient computation of the hidden state vector by processing one or more elements at a time using a distinct memory array and element processor, with selective storage of weight matrix columns, enabling scalable and multiplexable hardware implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional hardware accelerators are used for training or inference of gated recurrent neural networks, then computational accuracy can be achieved, but hardware area and power requirements become excessively large

Engineering Contradiction:
Improvecomputational accuracyVSAvoidhardware area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent segments the computation of high-dimensional vector operations into processing one or more elements at a time using a distinct memory array and element processor. This segmentation allows the system to handle complex computational tasks through divided, manageable operations, reducing the overall hardware area required while maintaining computational accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the traditional two-dimensional matrix multiplication approach into a more efficient dimensional arrangement by storing weight matrices in a distinct memory array and processing elements sequentially. This dimensional reorganization reduces hardware footprint while preserving computational capabilities.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If conventional hardware accelerators are used for training or inference of gated recurrent neural networks, then computational accuracy can be achieved, but power consumption becomes excessively high

Engineering Contradiction:
Improvecomputational accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

By segmenting the computation into element-wise operations processed sequentially through a single element processor, the system reduces simultaneous power consumption. This segmented approach allows the hardware to process computations with lower, more manageable power requirements rather than requiring high power for parallel operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent processes one or more elements at a time rather than all elements simultaneously, using partial action to achieve the computational goal. This partial processing approach reduces peak power consumption while maintaining overall computational accuracy through sequential execution.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If large weight matrices are stored in memory for gated recurrent neural network operations, then computational completeness is maintained, but storage distance and access complexity increase

Engineering Contradiction:
Improvecomputational completenessVSAvoidstorage distance
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the weight matrices from the main computational path and stores them in a distinct memory array. This extraction separates storage functionality from computation, reducing the complexity of data access and minimizing the storage distance required during operations while maintaining computational completeness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The weight matrices are pre-stored in the distinct memory array before computation begins. This preliminary storage arrangement eliminates the need for complex real-time data fetching operations, reducing access complexity and ensuring computational completeness through ready-available weights.

Inventive Principle:
Principle #10Preliminary action

4Adaptability or versatility

If element-wise operations are performed on high-dimensional vectors for gated recurrent neural networks, then neural network functionality is achieved, but resource intensity increases

Engineering Contradiction:
Improveneural network functionalityVSAvoidresource intensity
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the element-wise operations on high-dimensional vectors into discrete, manageable steps processed by a single element processor. This segmentation reduces resource intensity by avoiding the need for complex parallel hardware while maintaining neural network functionality through systematic processing of each element.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces traditional parallel hardware mechanical systems with a sequential element processor that handles computations through software-controlled operations. This substitution reduces resource intensity by using a simpler processing architecture that achieves the same neural network functionality through algorithmic efficiency rather than hardware parallelism.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12093802B2Gated unit for a gated recurrent neural network
Publication Date: 2024.09.17 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12093802B2 patent drawing
  • US12093802B2 patent drawing
  • US12093802B2 patent drawing

AI summary

The exemplary embodiments disclose a method, a computer program product, and a computer system for a gated recurrent neural network (RNN). The exemplary embodiments may include providing an element processor, providing a distinct memory array for a respective set of one or more elements of a hidden state vector, storing in the memory array a group of columns of weight matrices that enable a computation of the set of one or more elements, computing one or more elements of each of multiple activation vectors using a set of one or more columns of the group of columns associated with each of the multiple activation vectors, and performing by the element processor an elementwise gating operation on computed elements, resulting in the set of one or more elements.