Gateway Controlling Chip Hardware Packet Processing

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Solution Overview

Problem

Current IP tunneling technologies rely on software to package network packets, limiting processing speed due to software constraints.

Innovation Solution

A gateway controlling chip with a processing unit and storage unit that retrieves and processes network packets by determining packet type and performing specific operations listed in a packet operation list, utilizing hardware to accelerate the packaging process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If software is used to package network packets for IP tunneling, then the processing can be flexibly controlled, but the processing speed is limited by software performance

Engineering Contradiction:
Improvenetwork packet processing speedVSAvoidsoftware processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces software-based packet processing with a hardware-based solution using a dedicated processing unit in the gateway controlling chip. This hardware unit executes packet operations directly through compiled code from the packet operation list, eliminating the performance limitations of software processing while maintaining the required functionality for IP tunneling packet packaging and processing

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the execution environment from software interpretation to hardware execution by compiling the packet operation list into machine code that the processing unit can execute directly. This parameter change in the execution mode transforms the processing speed from software-limited to hardware-capable, significantly improving network packet processing throughput

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11153120B2Gateway controlling chip and network packet processing method
Publication Date: 2021.10.19 REALTEK SEMICON CORP
  • US11153120B2 patent drawing
  • US11153120B2 patent drawing
  • US11153120B2 patent drawing

AI summary

The present disclosure provides a gateway controlling chip and a network packet processing method thereof. The gateway controlling chip is configured to: retrieve a network packet; determine that the network packet is an upstream IP tunneling network packet; determine a packet type of the upstream IP tunneling network packet; retrieve a packet operation list corresponding to the packet type, wherein the packet operation list records a plurality of packet operations; and perform the packet operations for processing the network packet.