Gateway Communication Module Simultaneous Bus Access
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Solution Overview
Problem
Conventional communication modules for gateways experience high latency when multiple master units simultaneously access data, leading to inefficient data transmission and low bandwidth utilization due to shared system bus access conflicts.
Innovation Solution
A communication module design that enables simultaneous, delay-free transmission of data words between buffer memories and system buses through a message relaying unit, which arbitrates data transfer on the peripheral side, reducing waiting times and increasing bandwidth by allowing multiple system buses to access data simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple master units simultaneously access data through a shared system bus, then data transmission between different bus systems can occur, but access conflicts arise leading to high latency and low bandwidth utilization
Solution Approach 1:
The patent segments the data transmission path into two independent parts: (1) peripheral-side arbitration between multiple system buses and buffer memories, and (2) system bus access to the communication module. By introducing separate interface units for each system bus that can simultaneously access different buffer memories, the patent eliminates the bottleneck of shared system bus access while maintaining centralized protocol handling.
Solution Approach 2:
The patent introduces buffer memories as intermediary storage elements between the serial bus interface and multiple system buses. These buffer memories decouple the peripheral-side data preparation from the system bus access, allowing multiple master units to simultaneously retrieve data without conflicting for the same bus resources. The message relaying unit acts as a mediator that manages data flow between these components.
2Productivity
If a shared system bus is used for data access, then device complexity is reduced, but bandwidth utilization decreases due to access conflicts
Solution Approach 1:
The communication module is segmented into functionally independent units: a message relaying unit for protocol handling, multiple interface units for different system buses, and buffer memories for data storage. This segmentation allows each component to operate independently and simultaneously, increasing overall bandwidth utilization while keeping individual component complexity manageable.
Solution Approach 2:
The buffer memories serve multiple functions: they act as temporary storage for incoming serial bus data, as data sources for multiple system buses simultaneously, and as decoupling elements between different protocol domains. This multi-functionality increases bandwidth utilization without proportionally increasing device complexity.
Data Source
AI summary
A communication module for connecting a serial bus, which transmits data in packets, to a plurality of system buses of a gateway, which transmit data word by word, the communication module having a communication protocol unit, which is connected to the serial bus, for converting between data packages and messages, which are respectively made up of a plurality of data words, a message relaying unit for relaying messages between at least one message memory and the communication protocol unit, as well as buffer memories, a plurality of interface units, which are respectively connected to an associated system bus of the gateway, each interface unit being connected to at least one associated buffer memory, which stores a message temporarily, a transmission of data words via a plurality of system buses and their associated interface units from and to the buffer memories of the interface units taking place simultaneously, without delay.