Frequency Synchronization Gateway Selection in Mobile Networks

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Solution Overview

Problem

Current frequency synchronization technologies in mobile networks face challenges such as high deployment costs due to hop-by-hop methods and performance issues with packet-based protocols like PTPV2, which are affected by network noise and bandwidth concerns, leading to suboptimal frequency accuracy and scalability problems.

Innovation Solution

A method for automatically selecting and configuring a network clock as a frequency synchronization gateway within a mobile network, using a combination of end-to-end and link-by-link deployments, by collecting and comparing clock datasets to determine the best clock for optimal synchronization, and configuring it to interconnect with a master clock across different synchronization domains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hop-by-hop synchronization method is used, then frequency accuracy and reliability are improved, but deployment cost and device complexity increase significantly

Engineering Contradiction:
Improvefrequency accuracyVSAvoiddeployment cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The network is divided into two distinct synchronization domains: an end-to-end synchronization domain using PTPV2 protocol and a link-by-link synchronization domain using SyncE or TDM. This segmentation allows each domain to use the most appropriate synchronization method, reducing overall deployment cost while maintaining frequency accuracy where critical

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A frequency synchronization gateway is introduced as an intermediary network clock that connects the end-to-end synchronization domain with the link-by-link synchronization domain. This gateway performs clock reference recovery from the end-to-end domain and redistributes it in the link-by-link domain, eliminating the need for expensive hardware at every network element while maintaining synchronization quality

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If PTPV2 end-to-end scheme is used, then deployment cost is reduced, but frequency accuracy deteriorates due to network noise and packet delay variation

Engineering Contradiction:
Improvedeployment costVSAvoidfrequency accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The frequency synchronization gateway acts as an intermediary that terminates the PTPV2 end-to-end synchronization and converts it to a robust link-by-link synchronization domain. This gateway isolates the PTPV2 domain from network noise and packet delay variation, ensuring frequency accuracy is maintained in the downstream link-by-link domain without requiring expensive hardware at every node

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

By segmenting the network into two synchronization domains, the patent allows the end-to-end PTPV2 domain to benefit from low deployment cost while the link-by-link domain ensures frequency accuracy. The segmentation point at the frequency synchronization gateway optimizes the trade-off between cost and performance

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If multiple unicast PTPV2 synchronization flows are deployed, then support for legacy base stations is improved, but bandwidth consumption increases significantly

Engineering Contradiction:
Improvesupport for legacy base stationsVSAvoidbandwidth consumption
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The frequency synchronization gateway serves as an intermediary that consolidates multiple unicast PTPV2 synchronization flows into a single robust clock reference distribution. This gateway receives synchronization from the master clock and redistributes it efficiently to legacy base stations, maintaining compatibility while dramatically reducing bandwidth consumption on network links

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If static and arbitrary gateway selection is used, then implementation simplicity is maintained, but frequency accuracy and network performance deteriorate

Engineering Contradiction:
Improveimplementation simplicityVSAvoidfrequency accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a dynamic gateway selection mechanism where network clocks provide feedback information about their clock quality and synchronization performance. This feedback enables the network to automatically select the optimal frequency synchronization gateway based on real-time conditions, improving frequency accuracy without significantly increasing implementation complexity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The frequency synchronization gateway selection is made dynamic rather than static, allowing the network to adapt to changing conditions. The selection criteria include clock quality metrics and accumulated packet delay variation, enabling the system to automatically choose the best gateway for optimal frequency accuracy while maintaining reasonable implementation complexity

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2779489B1Method for selecting a network clock of a local synchronization domain of a mobile network as a frequency synchronization gateway
Publication Date: 2019.11.27 ALCATEL LUCENT SA
  • EP2779489B1 patent drawingFigure 1~2
  • EP2779489B1 patent drawingFigure 3~4
  • EP2779489B1 patent drawing

AI summary

A selection method is implemented in a mobile network (BN) comprising a group (G1) of first network clocks (N111-N114) each having a local clock (LC), belonging to a link-by-link synchronization domain in which they communicate in a link-by-link synchronization scheme and communicating in an end-to-end synchronization scheme with a master clock (MC) providing a frequency reference for synchronizing the local clocks (LC). This method comprises a step (i) consisting in collecting datasets of the local clocks (LC) of this group (G1), a step (ii) consisting in comparing these collected clock datasets to determine the best one according to criteria, then in selecting the first network clock (N113) offering this best clock dataset, and a step (iii) during which the selected first network clock is configured as a frequency synchronization gateway for interconnecting the master clock (MC) in an end-to-end synchronization domain by using a domain identifier of an end-to-end synchronization domain.