Gateway Device Shared Routing Table CAN Bus Latency

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Solution Overview

Problem

The existing configuration of combining two microcomputers to manage CAN frames for in-vehicle networks increases routing time and delays data transfer due to the need to route CAN frames across microcomputers.

Innovation Solution

A gateway device with two arithmetic processing units, each with multiple CAN channels and a common routing table, allows for efficient routing by defining shared routing rules across microcomputers, reducing the need for index searching and processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If two microcomputers are combined to meet the demand for CAN channels, then the number of communication channels is increased, but the routing time is increased and data transfer is delayed

Engineering Contradiction:
Improvenumber of CAN channelsVSAvoidrouting time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent merges the routing table functionality into a single shared memory space accessible by both microcomputers. Instead of each microcomputer maintaining separate routing tables, they share a common routing table stored in a unified memory location, allowing both processors to access routing information simultaneously without the overhead of inter-computer communication for table lookups.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a shared memory space as an intermediary between the two microcomputers. This shared memory acts as a mediator that stores the routing table and is accessible by both microcomputers, eliminating the need for one microcomputer to query the other for routing information and thus reducing routing time.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If two microcomputers are combined to manage CAN frames, then the communication capacity is increased, but the data transfer delay is increased

Engineering Contradiction:
Improvecommunication capacityVSAvoiddata transfer delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent combines the routing table storage into a single shared memory space that both microcomputers can access. This merging eliminates the need for inter-microcomputer communication when performing routing lookups, thereby maintaining high communication capacity while reducing data transfer delays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the gateway device's functionality such that routing table storage and access is separated from the microcomputers' main processing tasks. The shared memory space is dedicated specifically to storing routing information, allowing both microcomputers to access routing data independently and simultaneously without interfering with each other's CAN frame processing.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If separate routing tables are used in each microcomputer, then the system architecture is simplified, but the routing efficiency is reduced

Engineering Contradiction:
Improvesystem architectureVSAvoidrouting efficiency
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent merges the routing table functionality into a single shared memory space accessible by both microcomputers. This approach maintains relatively simple system architecture while dramatically improving routing efficiency, as both microcomputers can access the same routing information without the overhead of inter-computer communication or synchronization protocols.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11374786B2Gateway device
Publication Date: 2022.06.28 ASTEMO LTD
  • US11374786B2 patent drawing
  • US11374786B2 patent drawing
  • US11374786B2 patent drawing

AI summary

The invention realizes a gateway device capable of shortening the time required for routing to a CAN bus of the opposite microcomputer side and reducing the delay of data transfer. If the indexes are the same, a microcomputer 1 and a microcomputer 2 include common routing tables 10 and 20 in which the same contents are defined. The microcomputer 1 sends the index to the microcomputer 2. The microcomputer 2 that has received the index reads the routing rule defined in the common routing table 20 by the received index.