GC Detector Digital Sigma-Delta Circuit for Low-Noise Measurement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current Gas Chromatograph (GC) measurement systems face challenges with Sigma-Delta A/D converters that are not optimally suited for GC applications, leading to issues with power consumption, signal reduction, and noise optimization, particularly in the sub-hertz region, which affects the Signal-to-Noise Ratio (SNR) and requires expensive high-performance A/D converters.
Innovation Solution
The implementation of a digital logic-based Sigma-Delta A/D converter system that eliminates the integrator and achieves the Σ factor in a digital form, using a Field Programmable Gate Array (FPGA) or similar digital logic to share counter circuitry between multiple detector channels, thereby reducing complexity and power consumption while maintaining high resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a monolithic Sigma-Delta A/D converter is used for GC applications, then conversion functionality is provided, but power consumption is excessive and signal gain must be reduced
Solution Approach 1:
The patent divides the A/D conversion process into separate functional blocks: a Sigma-Delta modulator for noise shaping and a digital filter for signal processing. This segmentation allows each block to be optimized independently, reducing overall power consumption while maintaining measurement precision through specialized digital processing of the modulated signal.
Solution Approach 2:
The patent replaces the traditional analog integrator with a digital counter and digital logic circuitry. This substitution eliminates the need for precision analog components and reduces power consumption while achieving the same integration function through digital counting and accumulation, thereby maintaining measurement precision without excessive power draw.
2Reliability
If signal gain is reduced to match lower voltage A/D requirements, then voltage compatibility is achieved, but signal-to-noise ratio deteriorates
Solution Approach 1:
The patent replaces the analog integrator with a digital counter and digital logic circuitry. This substitution eliminates the need for precision analog components and reduces power consumption while achieving the same integration function through digital counting and accumulation, thereby maintaining measurement precision without excessive power draw.
Solution Approach 2:
The patent changes the operating parameters by using a digital counter with N-bit resolution instead of an analog integrator. This parameter change allows the system to process higher voltage signals directly without reduction, as the digital counter can accommodate a wide dynamic range, thereby maintaining signal-to-noise ratio while achieving voltage compatibility through digital processing.
3Device complexity
If an analog integrator is used in the Sigma-Delta A/D converter, then integration function is provided, but device complexity and power consumption increase
Solution Approach 1:
The patent replaces the analog integrator with a digital counter and digital logic circuitry. This substitution eliminates the need for precision analog components and reduces power consumption while achieving the same integration function through digital counting and accumulation, thereby maintaining measurement precision without excessive power draw.
Solution Approach 2:
The patent extracts the integration function from the analog domain and implements it separately in the digital domain using a counter and digital logic. This extraction allows the analog section to be simpler and lower power, while the digital section handles the integration function with reduced overall complexity and power consumption.
4Adaptability or versatility
If a fixed building block A/D converter is used, then standard functionality is provided, but adaptability to GC-specific requirements is limited
Solution Approach 1:
The patent divides the A/D conversion process into separate functional blocks: a Sigma-Delta modulator for noise shaping and a digital filter for signal processing. This segmentation allows each block to be optimized independently for GC applications, providing adaptability while using standard digital components that can be implemented in FPGAs or ASICs, balancing customization with implementation simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the GC measurement system's performance by improving noise immunity, reducing power consumption, and increasing the dynamic range without compromising SNR, making it more cost-effective and suitable for process measurement instruments.
Implementation Method 1
A Thermal Conductivity Detector (TCD) requires a certain amount of power to operate properly in a GC application. The thermal conductivity of the common GC carrier gasses hydrogen and helium is fixed.
Data Source
AI summary
A Gas Chromatograph (GC) detector comprises a first circuit, a second circuit, a digital subtractor and a digital logic shared between one to many detector channels to provide a GC measurement in a digital form. The first circuit includes a first counter circuitry to provide a first counter output. The second circuit includes a second counter circuitry to provide a second counter output. The GC detector includes a digital subtractor to subtract the first counter output from the second counter output and provide a digital subtractor output. The GC detector further includes a digital logic shared between one to many detector channels to implement at least a portion of the first counter circuitry and the second counter circuitry. The digital logic to receive the digital subtractor output and provides the GC measurement in the digital form. The GC detector may be based on a Thermal Conductivity Detector (TCD) in which an integrator of a Sigma-Delta (Σ-Δ) A/D converter is eliminated and the Σ factor of the Sigma-Delta (Σ-Δ) A/D converter is accomplished in a digital form.