GCL Correlator Bank Using Shared DFT for Lower Receiver Complexity
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Solution Overview
Problem
The complexity of correlating an input signal with a set of Generalized Chirp-Like (GCL) sequences in communication systems, particularly in receivers, increases significantly when multiple sequences are used, leading to high computational demands and hardware complexity.
Innovation Solution
A method and receiver architecture that process input signals using a single Discrete Fourier Transform (DFT) circuit and separate stages for delay line processing, with multiplication of signal samples with modulation sequences performed in a later stage, allowing for reduced complexity by calculating independent components once for all GCL sequences derived from a single Zadoff-Chu sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple GCL sequences are used for random access preambles, then the ability to distinguish simultaneous transmissions from different mobile terminals is improved, but the computational complexity and hardware requirements increase significantly
Solution Approach 1:
The patent combines multiple GCL sequence correlations into a unified processing framework where all sequences share common computational components. Instead of implementing separate correlation processors for each sequence, the invention merges them into a single system that processes multiple sequences simultaneously, reducing hardware duplication and computational overhead.
Solution Approach 2:
The patent creates a universal correlation processor that can handle multiple GCL sequences with different parameters (lengths, rates, shifts) using the same hardware structure. The processor is designed to be multi-functional, adapting to different sequence configurations through software control rather than requiring dedicated hardware for each sequence type.
2Measurement precision
If a full correlation processing approach is used for each GCL sequence, then accurate timing estimation is achieved, but the processor computations and power consumption increase
Solution Approach 1:
The patent implements partial correlation processing by identifying and processing only the critical portions of the correlation computation. Instead of performing complete correlation for all sequences, the system uses early termination, pruning of non-promising paths, and selective processing based on signal strength thresholds, reducing computational load while maintaining sufficient timing estimation accuracy.
Solution Approach 2:
The patent performs preliminary processing steps before full correlation, such as pre-computing autocorrelation properties, pre-identifying candidate timing positions, and pre-filtering weak signals. This preliminary action reduces the amount of computationally intensive full correlation processing needed later, thereby reducing power consumption while preserving timing estimation accuracy.
3Reliability
If separate correlation processors are implemented for each modulation sequence, then accurate distinction of simultaneous preambles is achieved, but the hardware complexity increases
Solution Approach 1:
The patent merges multiple sequence-specific correlation processors into a single unified processor that handles all modulation sequences. The unified processor uses shared computational resources, common memory structures, and integrated control logic to process multiple sequences simultaneously, eliminating the need for separate hardware processors for each sequence and thereby reducing overall hardware complexity.
Solution Approach 2:
The patent designs a universal correlation processor that can adapt to different modulation sequences through software configuration rather than hardware specialization. The processor implements multi-functionality by using the same hardware structure to process various sequence types (different lengths, rates, and shifts) by dynamically loading appropriate correlation templates and parameters.
Data Source
AI summary
A method for correlation of an input signal in a receiver is disclosed as well as a receiver and a communication system for implementing the method. The input signal is correlated with Generalized Chirp-Like (GCL) sequences being derived from a single Zadoff-Chu sequence modulated with at least two modulation sequences. The method includes at least the steps of processing samples of the input signal in a first delay line, in a Discrete Fourier Transform (DFT) circuit and in a second delay line. According to the invention, a multiplication of samples of the input signal with elements of modulation sequences corresponding to the at least two modulation sequences being used for deriving the GCL sequences is performed in a step after the processing in the first delay line. Then a DFT processing is performed using a DFT circuit.