GCN Accelerator Architecture for Workload-Balanced Sparse Aggregation

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Solution Overview

Problem

Existing GCN accelerators face inefficiencies due to workload imbalance and increased memory accesses, particularly in the aggregation phase, leading to performance losses and high energy consumption.

Innovation Solution

The SGCNAX architecture employs an outer-product-based computation architecture for intra-PE workload balance and a group-and-shuffle computing approach for inter-PE workload balance, combined with a spatial tiling strategy to optimize dataflow and reduce off-chip DRAM accesses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing GCN accelerators use conventional computation architectures, then device complexity is reduced, but intra-PE workload imbalance occurs causing under-utilization of MAC units

Engineering Contradiction:
ImproveMAC unit utilizationVSAvoidcomputation architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The computation is segmented into outer-product operations that can be independently executed. Each MAC unit processes a specific outer-product computation, allowing fine-grained parallelism and better load distribution across processing elements, thus improving utilization without requiring complex inter-unit coordination

Inventive Principle:
Principle #1Segmentation

2Loss of time

If existing GCN accelerators use simple data partitioning, then device complexity is low, but inter-PE workload imbalance occurs causing idle waiting time

Engineering Contradiction:
Improveidle waiting timeVSAvoiddata partitioning complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The system performs preliminary analysis of the sparse matrix structure to identify and group rows with similar density patterns before computation. This pre-grouping ensures that PEs receive balanced workloads from the outset, eliminating idle waiting time during synchronization without requiring complex dynamic load balancing mechanisms during execution

Inventive Principle:
Principle #10Preliminary action

3Productivity

If existing GCN accelerators process sparse matrices directly, then ease of operation is maintained, but memory access efficiency decreases leading to performance loss

Engineering Contradiction:
Improvecomputation efficiencyVSAvoidmemory access volume
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The system applies different processing strategies to different parts of the sparse matrix based on local density characteristics. Rows are grouped by density, and each group is processed with optimized data loading strategies that exploit local data reuse patterns, reducing overall memory access volume while maintaining computational efficiency

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12493779B2SGCNAX: a scalable graph convolutional neural network accelerator with workload balancing
Publication Date: 2025.12.09 GEORGE WASHINGTON UNIVERSITY
  • US12493779B2 patent drawing
  • US12493779B2 patent drawing
  • US12493779B2 patent drawing

AI summary

We introduce SGCNAX, a scalable GCN accelerator architecture for the high-performance and energy-efficient acceleration of GCNs. Unlike prior GCN accelerators that either employ limited loop optimization techniques, or determine the design variables based on random sampling, we systematically explore the loop optimization techniques for GCN acceleration and provide a flexible GCN dataflow that adapts to different GCN configurations to achieve optimal efficiency. We further provide two hardware-based techniques to address the workload imbalance problem caused by the unbalanced distribution of zeros in GCNs. Specifically, SGCNAX exploits an outer-product-based computation architecture that mitigates the intra-PE (Processing Elements) workload imbalance, and employs a group-and-shuffle approach to mitigate the inter-PE workload imbalance.